公开(公告)号：US20190027403A1

公开(公告)日：2019-01-24

申请号：US16140342

申请日：2018-09-24

Applicant: APPLIED MATERIALS, INC.

Inventor： Sree Rangasai V. KESAPRAGADA ,  Kevin MORAES ,  Srinivas GUGGILLA ,  He REN ,  Mehul NAIK ,  David THOMPSON ,  Weifeng YE ,  Yana CHENG ,  Yong CAO ,  Xianmin TANG ,  Paul F. MA ,  Deenesh PADHI

IPC: H01L21/768 ,  H01L21/02

CPC classification number: H01L21/76832 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02178 ,  H01L21/02211 ,  H01L21/02219 ,  H01L21/02266 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/3105 ,  H01L21/32 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834

Abstract: In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.

公开(公告)号：US20170053784A1

公开(公告)日：2017-02-23

申请号：US15240927

申请日：2016-08-18

Applicant: APPLIED MATERIALS, INC.

Inventor： Anantha K. SUBRAMANI ,  Hanbing WU ,  Wei W. WANG ,  Ashish GOEL ,  Srinivas GUGGILLA ,  Lavinia NISTOR

IPC: H01J37/34 ,  C23C14/34

CPC classification number: H01J37/3417 ,  C23C14/3464 ,  C23C14/564 ,  H01J37/32871 ,  H01J37/3429 ,  H01J37/3441 ,  H01J37/3447 ,  H01J37/3464 ,  H01J37/3485

Abstract: Embodiments of a method and apparatus for co-sputtering multiple target materials are provided herein. In some embodiments, a process chamber including a substrate support to support a substrate; a plurality of cathodes coupled to a carrier and having a corresponding plurality of targets to be sputtered onto the substrate; and a process shield coupled to the carrier and extending between adjacent pairs of the plurality of targets.

Abstract translation: 本文提供了用于共溅射多个靶材料的方法和装置的实施例。 在一些实施例中，包括用于支撑衬底的衬底支撑件的处理室; 耦合到载体并且具有相应的多个靶以溅射到所述衬底上的多个阴极; 以及耦合到所述载体并在所述多个靶的相邻对之间延伸的过程屏蔽。

公开(公告)号：US20160268207A1

公开(公告)日：2016-09-15

申请号：US14711135

申请日：2015-05-13

Applicant: Applied Materials, Inc.

Inventor： Mehul B. NAIK ,  Paul F. MA ,  Tae Hong HA ,  Srinivas GUGGILLA

IPC: H01L23/532 ,  H01L23/528 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/53238 ,  H01L21/28556 ,  H01L21/76846

Abstract: A method and apparatus for forming an interconnect on a substrate is provided. A protective layer is formed on the substrate and in a via formed on the substrate wherein the protective layer is resistant to a halogen containing material. A barrier layer is formed on top of the protective layer. The barrier layer comprises a halogen containing material. A metal layer is deposited over the barrier layer. In another embodiment, the protective layer is selectively deposited in the via.

Abstract translation: 提供了一种用于在基板上形成互连的方法和装置。 在衬底上形成保护层，形成在衬底上的通孔中，其中保护层对含卤素材料具有耐受性。 在保护层的顶部形成阻挡层。 阻挡层包括含卤素材料。 在阻挡层上沉积金属层。 在另一个实施例中，保护层选择性地沉积在通孔中。