公开(公告)号：US10428421B2

公开(公告)日：2019-10-01

申请号：US15221453

申请日：2016-07-27

Applicant: ASM IP HOLDING B.V.

Inventor： Suvi P. Haukka ,  Raija H. Matero ,  Elina Färm ,  Tom E. Blomberg

IPC: C23C16/455 ,  C23C16/04 ,  C23C16/40

Abstract: Methods are provided for selectively depositing a material on a first metal or metallic surface of a substrate relative to a second, dielectric surface of the substrate, or for selectively depositing metal oxides on a first metal oxide surface of a substrate relative to a second silicon oxide surface. The selectively deposited material can be, for example, a metal, metal oxide, metal nitride, metal silicide, metal carbide and/or dielectric material. In some embodiments a substrate comprising a first metal or metallic surface and a second dielectric surface is alternately and sequentially contacted with a first vapor-phase metal halide reactant and a second reactant. In some embodiments a substrate comprising a first metal oxide surface and a second silicon oxide surface is alternately and sequentially contacted with a first vapor phase metal fluoride or chloride reactant and water.

公开(公告)号：US10280519B2

公开(公告)日：2019-05-07

申请号：US15835262

申请日：2017-12-07

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01J37/32 ,  H01L21/3065 ,  H01L21/311

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.

公开(公告)号：US20170110601A1

公开(公告)日：2017-04-20

申请号：US14885721

申请日：2015-10-16

Applicant: ASM IP HOLDING B.V.

Inventor： Tom E. Blomberg ,  Hannu Huotari

IPC: H01L31/0232 ,  H01L33/00 ,  H01L33/58 ,  H01L31/18

CPC classification number: H01L31/02322 ,  C23C14/06 ,  C23C14/0694 ,  C23C16/22 ,  C23C16/30 ,  C23C16/45525 ,  H01L31/032 ,  H01L31/062 ,  H01L31/072 ,  H01L31/18 ,  H01L33/005 ,  H01L33/58 ,  H01L2933/0016 ,  H01L2933/0025 ,  Y02E10/50

Abstract: Deposition processes are disclosed herein for depositing thin films comprising a dielectric transition metal compound phase and a conductive or semiconducting transition metal compound phase on a substrate in a reaction space. Deposition processes can include a plurality of super-cycles. Each super-cycle may include a dielectric transition metal compound sub-cycle and a reducing sub-cycle. The dielectric transition metal compound sub-cycle may include contacting the substrate with a dielectric transition metal compound. The reducing sub-cycle may include alternately and sequentially contacting the substrate with a reducing agent and a nitrogen reactant. The thin film may comprise a dielectric transition metal compound phase embedded in a conductive or semiconducting transition metal compound phase.

公开(公告)号：US20170037513A1

公开(公告)日：2017-02-09

申请号：US15221453

申请日：2016-07-27

Applicant: ASM IP HOLDING B.V.

Inventor： Suvi P. Haukka ,  Raija H. Matero ,  Elina Färm ,  Tom E. Blomberg

IPC: C23C16/455 ,  C23C16/06

CPC classification number: C23C16/45525 ,  C23C16/04 ,  C23C16/405

Abstract: Methods are provided for selectively depositing a material on a first metal or metallic surface of a substrate relative to a second, dielectric surface of the substrate, or for selectively depositing metal oxides on a first metal oxide surface of a substrate relative to a second silicon oxide surface. The selectively deposited material can be, for example, a metal, metal oxide, metal nitride, metal silicide, metal carbide and/or dielectric material. In some embodiments a substrate comprising a first metal or metallic surface and a second dielectric surface is alternately and sequentially contacted with a first vapor-phase metal halide reactant and a second reactant. In some embodiments a substrate comprising a first metal oxide surface and a second silicon oxide surface is alternately and sequentially contacted with a first vapor phase metal fluoride or chloride reactant and water.

Abstract translation: 提供了用于相对于衬底的第二电介质表面选择性地将材料沉积在衬底的第一金属或金属表面上的方法，或用于相对于第二氧化硅选择性地在衬底的第一金属氧化物表面上沉积金属氧化物 表面。 选择性沉积的材料可以是例如金属，金属氧化物，金属氮化物，金属硅化物，金属碳化物和/或电介质材料。 在一些实施方案中，包含第一金属或金属表面和第二电介质表面的基底与第一气相金属卤化物反应物和第二反应物交替且顺序地接触。 在一些实施方案中，包含第一金属氧化物表面和第二氧化硅表面的衬底与第一气相金属氟化物或氯化物反应物和水交替且顺序地接触。

公开(公告)号：US11956977B2

公开(公告)日：2024-04-09

申请号：US17462181

申请日：2021-08-31

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Jan Willem Maes

IPC: H10B69/00 ,  H01L21/02 ,  H01L49/02 ,  H10B41/27 ,  H10B43/27 ,  H10B41/35 ,  H10B43/35

CPC classification number: H10B69/00 ,  H01L21/02538 ,  H01L21/0262 ,  H01L21/02658 ,  H01L28/00 ,  H10B43/27 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35

Abstract: A method for forming a V-NAND device is disclosed. Specifically, the method involves deposition of at least one of semiconductive material, conductive material, or dielectric material to form a channel for the V-NAND device. In addition, the method may involve a pretreatment step where ALD, CVD, or other cyclical deposition processes may be used to improve adhesion of the material in the channel.

公开(公告)号：US20240026548A1

公开(公告)日：2024-01-25

申请号：US18349444

申请日：2023-07-10

Applicant: ASM IP HOLDING B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01L21/311 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32 ,  H01L21/3065

CPC classification number: C23F4/02 ,  C23F1/12 ,  H01L21/32135 ,  C09K13/00 ,  H01L21/31122 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32009 ,  H01J37/3244 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.

公开(公告)号：US11739428B2

公开(公告)日：2023-08-29

申请号：US17646389

申请日：2021-12-29

Applicant: ASM IP HOLDING B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01L21/311 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32 ,  H01L21/3065

CPC classification number: C23F4/02 ,  C09K13/00 ,  C09K13/08 ,  C09K13/10 ,  C23F1/12 ,  H01J37/32009 ,  H01J37/3244 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/32135 ,  H01L21/31138

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.

公开(公告)号：US20230253182A1

公开(公告)日：2023-08-10

申请号：US18188255

申请日：2023-03-22

Applicant: ASM IP HOLDING B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi P. Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: H01J37/32 ,  C23F1/12 ,  H01L21/311 ,  C23G5/00 ,  H01L21/3213

CPC classification number: H01J37/32009 ,  C23F1/12 ,  H01L21/31116 ,  C23G5/00 ,  H01L21/32135

Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase non-metal halide reactant and a second vapor phase halide reactant. In some embodiments both the first and second reactants are chloride reactants. In some embodiments the first reactant is fluorinating gas and the second reactant is a chlorinating gas. In some embodiments a thermal ALE cycle is used in which the substrate is not contacted with a plasma reactant.

公开(公告)号：US11450591B2

公开(公告)日：2022-09-20

申请号：US16838455

申请日：2020-04-02

Applicant: ASM IP HOLDING B.V.

Inventor： Tom E. Blomberg ,  Linda Lindroos ,  Hannu Huotari

IPC: H01L23/48 ,  H01L21/285 ,  C23C16/455 ,  H01L21/768 ,  C23C16/34

Abstract: An atomic layer deposition (ALD) process for depositing a fluorine-containing thin film on a substrate can include a plurality of super-cycles. Each super-cycle may include a metal fluoride sub-cycle and a reducing sub-cycle. The metal fluoride sub-cycle may include contacting the substrate with a metal fluoride. The reducing sub-cycle may include alternately and sequentially contacting the substrate with a reducing agent and a nitrogen reactant.

公开(公告)号：US11230769B2

公开(公告)日：2022-01-25

申请号：US16881718

申请日：2020-05-22

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi P. Haukka ,  Marko J. Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01L21/311 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32 ,  H01L21/3065

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.