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    Phase-detector-less method and apparatus for minimizing skew between bonded channel groups
    11.
    发明授权
    Phase-detector-less method and apparatus for minimizing skew between bonded channel groups 有权
    无相位检测器的方法和装置，用于最小化接合通道组之间的偏移

    公开(公告)号：US07908528B1

    公开(公告)日：2011-03-15

    申请号：US11747152

    申请日：2007-05-10

    Applicant: Andy Turudic

    Inventor： Andy Turudic

    IPC: G01R31/3193 ,  G01R31/40

    CPC classification number: H03K5/131 ,  H04L7/0008 ,  H04L7/0091 ,  H04L7/033

    Abstract: A method for aligning output from a first transmit source and a second transmit source is provided. The method includes combining complementary portions of differential signals generated from respective transmit sources to generate an output bit sequence and comparing the output bit sequence with an input bit sequence used to generate the differential signals. The method further includes adjusting one of the first or the second transmit source based on the comparison to align the output from the first and the second transmit sources. A PLD having the capability to align channels of different octets is also provided.

    Abstract translation: 提供了一种用于对准来自第一发射源和第二发射源的输出的方法。 该方法包括组合从相应发射源产生的差分信号的互补部分以产生输出比特序列，并将输出比特序列与用于产生差分信号的输入比特序列进行比较。 该方法还包括基于比较来调整第一或第二发射源中的一个，以对准来自第一和第二发射源的输出。 还提供了具有对准不同八位字节的通道的能力的PLD。

    Circuit board assembly method
    12.
    发明授权
    Circuit board assembly method 失效
    电路板组装方法

    公开(公告)号：US6078505A

    公开(公告)日：2000-06-20

    申请号：US312155

    申请日：1999-05-14

    Applicant: Andy Turudic

    Inventor： Andy Turudic

    IPC: H05K1/00 ,  H05K1/11 ,  H05K3/34 ,  H05K1/18

    CPC classification number: H05K3/3452 ,  H05K3/3436 ,  H05K1/0295 ,  H05K1/111 ,  H05K2201/09709 ,  H05K2201/099 ,  H05K2201/09954 ,  H05K2201/10689 ,  H05K2201/10734 ,  Y02P70/613

    Abstract: A method is disclosed for attaching a device package to a circuit board with a chip mount area that has a set of elongated pads located near the perimeter of a chip mount area. In accordance with this method, a mask is formed on the circuit board. A plurality of openings are formed in the mask, including a plurality of openings over at least one of the pads. A plurality of adhesive masses area attached to a surface of the device package, each adhesive mass being aligned with an electrical contact area on the surface of the device package. The device package is positioned over the circuit board to align the adhesive masses with the openings in the mask, and the device package is attached to the circuit board. In one embodiment, the mask openings are formed in a staggered formation. An advantage of this method is that a less expensive chip of the ball grid array type may be used on a circuit board design for gull-wing-leaded chip packages without a substantial redesign of the circuit board. The invention also allows ball grid array-type packages and gull-wing leaded chip packages to be used interchangeably for the same circuit board design with only a modification of the mask used in the circuit board fabrication process.

    Abstract translation: 公开了一种用于将器件封装附接到具有芯片安装区域的电路板的方法，该芯片安装区域具有位于芯片安装区域的周边附近的一组细长焊盘。 根据该方法，在电路板上形成掩模。 在掩模中形成多个开口，包括至少一个焊盘上的多个开口。 多个粘合剂区域附接到装置包装的表面，每个粘合剂块与装置包装表面上的电接触区域对准。 器件封装位于电路板上方，以将粘合剂质量与掩模中的开口对准，并将器件封装连接到电路板。 在一个实施例中，掩模开口以交错的形式形成。 该方法的优点在于，可以在电路板设计中将球栅阵列类型的较便宜的芯片用于鸥翼引线芯片封装，而不需要重新设计电路板。 本发明还允许球栅阵列型封装和鸥翼引线芯片封装可以互换地用于相同的电路板设计，而仅用于电路板制造工艺中使用的掩模的修改。

    Out-of-band loopback control scheme
    13.
    发明授权
    Out-of-band loopback control scheme 失效
    带外环回控制方案

    公开(公告)号：US5422876A

    公开(公告)日：1995-06-06

    申请号：US117932

    申请日：1993-09-07

    Applicant: Andy Turudic

    Inventor： Andy Turudic

    IPC: H04B17/40 ,  H04J3/14 ,  H04L1/24 ,  H04B3/46

    CPC classification number: H04J3/14 ,  H04B17/401 ,  H04L1/243

    Abstract: A communications method and a network for carrying out the method are provided. The network includes a loopback command system and a first link station connected to a communications link. The link traverses several loopback-capable devices as it extends from the first link station to a second link station remote from the first link station. The loopback command system controls the loopback-capable devices to cause them to loopback. In order to command a loopback of a particular loopback-capable device, the first link station generates an initial loopback value and forwards the same over the link to a downstream loopback-capable device located along the link. Each loopback-capable device receives a loopback value from an upstream device, and compares if the received value is equal to a predetermined value. If the loopback value is equal to the predetermined value, the device is placed into a loopback state. Otherwise, the loopback value is modified by the device, and the modified loopback value is forwarded to the next downstream device located along the link. The loopback value may be represented by a digital bit word, or by the position of a particular bit within a bit stream of the link.

    Abstract translation: 提供了一种用于执行该方法的通信方法和网络。 网络包括环回命令系统和连接到通信链路的第一链路站。 当链路从第一链路站延伸到远离第一链路站的第二链路站时，链路穿过多个具有环回能力的设备。 loopback命令系统控制环回设备，使其环回。 为了指定特定的具有环回功能的设备的环回，第一链路站产生初始环回值，并通过链路将其转发到沿着链路位于下游环回设备。 每个具有环回功能的设备从上游设备接收环回值，并比较接收到的值是否等于预定值。 如果环回值等于预定值，则将该设备置于环回状态。 否则，环回值由设备修改，修改后的环回值转发​​到沿链路位于下一个下游设备。 环回值可以由数字比特字或链路的比特流内的特定比特的位置来表示。

    Transceiver system with reduced latency uncertainty
    16.
    发明申请
    Transceiver system with reduced latency uncertainty 有权
    收发器系统具有降低的延迟不确定性

    公开(公告)号：US20090161738A1

    公开(公告)日：2009-06-25

    申请号：US12283652

    申请日：2008-09-15

    Applicant: Neville Carvalho ,  Allan Thomas Davidson ,  Andy Turudic ,  Bruce B. Pedersen ,  David W. Mendel ,  Kalyan Kankipati ,  Michael Menghui Zheng ,  Sergey Shumarayev ,  Seungmyon Park ,  Tim Tri Hoang ,  Kumara Tharmalingam

    Inventor： Neville Carvalho ,  Allan Thomas Davidson ,  Andy Turudic ,  Bruce B. Pedersen ,  David W. Mendel ,  Kalyan Kankipati ,  Michael Menghui Zheng ,  Sergey Shumarayev ,  Seungmyon Park ,  Tim Tri Hoang ,  Kumara Tharmalingam

    IPC: H04L7/00 ,  H04B1/38

    CPC classification number: H04L25/14

    Abstract: A transceiver system with reduced latency uncertainty is described. In one implementation, the transceiver system has a word aligner latency uncertainty of zero. In another implementation, the transceiver system has a receiver-to-transmitter transfer latency uncertainty of zero. In yet another implementation, the transceiver system has a word aligner latency uncertainty of zero and a receiver-to-transmitter transfer latency uncertainty of zero. In one specific implementation, the receiver-to-transmitter transfer latency uncertainty is eliminated by using the transmitter parallel clock as a feedback signal in the transmitter phase locked loop (PLL). In one implementation, this is achieved by optionally making the transmitter divider, which generates the transmitter parallel clock, part of the feedback path of the transmitter PLL. In one implementation, the word aligner latency uncertainty is eliminated by using a bit slipper to slip bits in such a way so that the total delay due to the word alignment and bit slipping is constant for all phases of the recovered clock. This allows for having a fixed and known latency between the receipt and transmission of bits for all phases of parallelization by the deserializer. In one specific implementation, the total delay due to the bit shifting by the word aligner and the bit slipping by the bit slipper is zero since the bit slipper slips bits so as to compensate for the bit shifting that was performed by the word aligner.

    Abstract translation: 描述了具有降低的等待时间不确定性的收发机系统。 在一个实现中，收发器系统具有字对齐器等待时间不确定度为零。 在另一个实现中，收发器系统具有接收器到发射器的传输等待时间不确定度为零。 在另一个实现中，收发器系统具有字对齐器延迟不确定度为零和接收器到发射器的传输等待时间不确定度为零。 在一个具体实现中，通过在发射机锁相环（PLL）中使用发射机并行时钟作为反馈信号来消除接收机到发射机的传输等待时间不确定性。 在一个实现中，这通过可选地使发射机分频器（其产生发射机并行时钟）作为发射机PLL的反馈路径的一部分来实现。 在一个实施方案中，通过使用位拖动器以这样的方式滑动位来消除字对齐器延迟不确定性，使得由于字对齐和位滑动引起的总延迟对于恢复时钟的所有阶段是恒定的。 这允许在由解串器的并行化的所有阶段的位的接收和传输之间具有固定和已知的等待时间。 在一个具体实现中，由于位对准器的位移和由位拖动器的位滑动导致的总延迟为零，因为位拖动器滑动位，以补偿由字对准器执行的位移。

    Sideways-fed transmitter
    17.
    发明申请
    Sideways-fed transmitter 审中-公开
    侧向送料变送器

    公开(公告)号：US20070286266A1

    公开(公告)日：2007-12-13

    申请号：US11451075

    申请日：2006-06-12

    Applicant: Kenneth W. Paist ,  Andy Turudic

    Inventor： Kenneth W. Paist ,  Andy Turudic

    IPC: H04B1/38

    CPC classification number: H04L25/03057 ,  H04B3/04 ,  H04L25/03343 ,  H04L2025/03356

    Abstract: An apparatus for transmitting and receiving data via a transmission medium. The apparatus includes a local receiver and a local transmitter. The local receiver receives an incoming data signal transmitted through the transmission medium by a remote transmitter and derives from the incoming data signal one or more processing parameters corresponding to one or more characteristics of the transmission medium. The local transmitter receives the one or more processing parameters from the local receiver, generates an outgoing data signal using the one or more processing parameters, and transmits the outgoing data signal through the transmission medium.

    Abstract translation: 一种用于经由传输介质发送和接收数据的装置。 该装置包括本地接收机和本地发射机。 本地接收机接收由远程发射机通过传输介质传输的传入数据信号，并从输入数据信号中获得与传输介质的一个或多个特性对应的一个或多个处理参数。 本地发射机从本地接收机接收一个或多个处理参数，使用一个或多个处理参数产生输出数据信号，并通过传输介质发送输出数据信号。

    Multi-layer tolerance checker
    18.
    发明授权
    Multi-layer tolerance checker 失效
    多层公差检查器

    公开(公告)号：US4985675A

    公开(公告)日：1991-01-15

    申请号：US479272

    申请日：1990-02-13

    Applicant: Andy Turudic

    Inventor： Andy Turudic

    IPC: G01R31/28 ,  H05K1/02 ,  H05K3/42 ,  H05K3/46

    CPC classification number: G01R31/2805 ,  H05K3/4638 ,  H05K1/0268 ,  H05K2201/09781 ,  H05K3/429

    Abstract: Multi-layer printed circuit boards are sometimes connected to transmission paths which may be susceptible to electrical discharges associated with transient electrical events occurring along the transmission path. A method is provided for assuring that two respective layers of the printed circuit board are aligned within predetermined tolerances. Aligning respective layers within acceptable tolerances provides a means of assuring that predetermined distances between a ground layer and a power layer will be maintained, thereby ensuring that electrical arcing will not occur between the power and ground layer in the event of voltage spikes or current surges.

    Abstract translation: 多层印刷电路板有时连接到传输路径，传输路径可能易受与沿传输路径发生的瞬态电事件相关的放电的影响。 提供了一种确保印刷电路板的两个相应层在预定公差内对准的方法。 将各层对准可接受的公差提供了确保接地层和功率层之间的预定距离将被维持的手段，从而确保在电压尖峰或电流浪涌的情况下电力和接地层之间不会发生电弧。

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