公开(公告)号：US12021173B2

公开(公告)日：2024-06-25

申请号：US17435016

申请日：2020-11-06

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Mingxing Wang ,  Binbin Tong ,  Lizhen Zhang ,  Chenyang Zhang ,  Zhen Zhang ,  Xiawei Yun ,  Guangcai Yuan ,  Xue Dong ,  Muxin Di ,  Zhiwei Liang ,  Ke Wang ,  Zhanfeng Cao

IPC: H01L33/38 ,  H01L25/075 ,  H01L33/00 ,  H01L33/46 ,  H01L33/62

CPC classification number: H01L33/382 ,  H01L25/0753 ,  H01L33/005 ,  H01L33/46 ,  H01L33/62 ,  H01L2933/0016 ,  H01L2933/0066

Abstract: A light-emitting diode (LED) chip includes a plurality of epitaxial structures, at least one first electrode, and a plurality of second electrodes. Any two adjacent epitaxial structures of the plurality of epitaxial structures have a gap therebetween. Each epitaxial structure includes a first semiconductor pattern, a light-emitting pattern and a second semiconductor pattern stacked in sequence. First semiconductor patterns in at least two of the plurality of epitaxial structures are connected to each other to form a first semiconductor layer. A first electrode is electrically connected to the first semiconductor layer. Each second electrode is electrically connected to the second semiconductor pattern in at least one of the plurality of epitaxial structures.

公开(公告)号：US20240194698A1

公开(公告)日：2024-06-13

申请号：US17772395

申请日：2021-06-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lizhong Wang ,  Ce Ning ,  Yunping Di ,  Binbin Tong ,  Zhen Zhang ,  Zhenyu Zhang ,  Fuqiang Li ,  Chengfu Xu

IPC: H01L27/12

CPC classification number: H01L27/1251 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/127

Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes an active area and a non-active area located at the periphery of the active area, wherein the active area includes an opening area and a non-opening area. The displaying base plate includes a substrate and a thin-film transistor disposed on one side of the substrate, wherein the thin-film transistor includes a grid electrode, an active layer, a source-drain electrode and an auxiliary film layer, an excavation area is disposed on the auxiliary film layer, and an orthographic projection of the excavation area on the substrate at least partially covers the opening area.