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公开(公告)号：US12235557B2
公开(公告)日：2025-02-25
申请号：US17765769
申请日：2021-06-29
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhen Zhang , Fuqiang Li , Zhenyu Zhang , Yunping Di , Lizhong Wang , Zheng Fang , Jiahui Han , Yawei Wang , Chenyang Zhang , Chengfu Xu , Ce Ning , Pengxia Liang , Feihu Zhou , Xianqin Meng , Weiting Peng , Qiuli Wang , Binbin Tong , Rui Huang , Tianmin Zhou , Wei Yang
IPC: G02F1/1368 , G02F1/1362 , H01L27/12
Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.
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公开(公告)号：US20240212564A1
公开(公告)日：2024-06-27
申请号：US17913258
申请日：2021-11-04
Applicant: BOE Technology Group Co., Ltd.
Inventor： Lizhong Wang , Ce Ning , Yunping Di , Binbin Tong , Chengfu Xu , Dapeng Xue , Shuilang Dong , Nianqi Yao
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2300/0426 , G09G2300/0842 , G09G2310/0267 , G09G2310/062 , G09G2310/08
Abstract: A display substrate, a manufacturing method thereof and a display apparatus are provided. In the present disclosure, a first transistor group with oxide semiconductor as an active layer material is disposed on a side of a second transistor group with polysilicon as an active layer material away from the base, and an area enclosed by orthographic projections of the transistors in the first transistor group on the base is overlapped with an area enclosed by orthographic projections of the transistors in the second transistor group on the base. Stable performance of the transistors included can be ensured in a manufacturing process of the first transistor group and the second transistor group located in different layers, and at the same time, an area occupied by the driving circuit can be reduced so as to decrease a frame width of a display apparatus or improve resolution of the display apparatus.
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公开(公告)号：US11810389B2
公开(公告)日：2023-11-07
申请号：US17419909
申请日：2020-09-29
Inventor： Yi Liu , Shijun Wang , Wenkai Mu , Bo Feng , Xinlan Yang , Yang Wang , Zhan Wei , Tengfei Ding , Jun Fan , Chengfu Xu
CPC classification number: G06V40/1306 , G06F3/0412 , G06F3/0446 , G06F3/04164 , G06F3/04166
Abstract: The present disclosure provides fingerprint recognition substrate including fingerprint recognition units arranged in array, signal reading line groups and gating circuits, fingerprint recognition units are divided into first fingerprint recognition groups arranged along row direction, first fingerprint recognition groups, signal reading line groups and gating circuits are in one-to-one correspondence with one another; first fingerprint recognition group includes fingerprint recognition units consecutively arranged in row direction, signal reading line group includes signal reading lines each coupled to corresponding column of fingerprint recognition units; gating circuit includes switch circuits each coupled to one signal transmission channel on signal receiving unit through corresponding switch circuit; among all signal reading lines, different signal reading lines in same signal reading line group are coupled to different signal transmission channels, and at least two signal reading lines in different signal reading line groups are coupled to same signal transmission channel.
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4.发明授权公开(公告)号：US11170681B2
公开(公告)日：2021-11-09
申请号：US16066749
申请日：2018-01-04
Inventor： Yan Li , Chengfu Xu , Lingyun Shi , Wei Sun
Abstract: A gate driving circuit, a driving method thereof, a gate driver, a display panel and a display apparatus. In the gate driving circuit, a pull-up sub-circuit is configured to control the potential of a pull-up node according to signals inputted from first, second, third, fourth and fifth signal terminals and the potential of a pull-down node; a reset sub-circuit is configured to reset the potential of the pull-up node according to a signal inputted from a reset terminal; a pull-down sub-circuit is configured to control the potential of the pull-down node according to a signal inputted from the fourth signal terminal, a signal outputted from an output terminal and the potential of the pull-up node; and an output sub-circuit is configured to control a signal outputted from the output terminal according to a signal inputted from the third signal terminal, the potential of the pull-down node and the potential of the pull-up node.
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公开(公告)号：US12217651B2
公开(公告)日：2025-02-04
申请号：US17913258
申请日：2021-11-04
Applicant: BOE Technology Group Co., Ltd.
Inventor： Lizhong Wang , Ce Ning , Yunping Di , Binbin Tong , Chengfu Xu , Dapeng Xue , Shuilang Dong , Nianqi Yao
IPC: G09G3/20
Abstract: A display substrate, a manufacturing method thereof and a display apparatus are provided. In the present disclosure, a first transistor group with oxide semiconductor as an active layer material is disposed on a side of a second transistor group with polysilicon as an active layer material away from the base, and an area enclosed by orthographic projections of the transistors in the first transistor group on the base is overlapped with an area enclosed by orthographic projections of the transistors in the second transistor group on the base. Stable performance of the transistors included can be ensured in a manufacturing process of the first transistor group and the second transistor group located in different layers, and at the same time, an area occupied by the driving circuit can be reduced so as to decrease a frame width of a display apparatus or improve resolution of the display apparatus.
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Patent Agency Ranking
公开(公告)号：US20240194698A1
公开(公告)日：2024-06-13
申请号：US17772395
申请日：2021-06-29
Applicant: BOE Technology Group Co., Ltd.
Inventor： Lizhong Wang , Ce Ning , Yunping Di , Binbin Tong , Zhen Zhang , Zhenyu Zhang , Fuqiang Li , Chengfu Xu
IPC: H01L27/12
CPC classification number: H01L27/1251 , H01L27/1222 , H01L27/124 , H01L27/127
Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes an active area and a non-active area located at the periphery of the active area, wherein the active area includes an opening area and a non-opening area. The displaying base plate includes a substrate and a thin-film transistor disposed on one side of the substrate, wherein the thin-film transistor includes a grid electrode, an active layer, a source-drain electrode and an auxiliary film layer, an excavation area is disposed on the auxiliary film layer, and an orthographic projection of the excavation area on the substrate at least partially covers the opening area.
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公开(公告)号：US12236010B2
公开(公告)日：2025-02-25
申请号：US17776482
申请日：2021-05-27
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yapeng Li , Xuan Feng , Lei Wang , Ping Zhang , Wenhao Tian , Yunke Qin , Yangbing Li , Chengfu Xu
IPC: G06F3/01
Abstract: Provided is a wearable display device. The wearable display device includes a display panel, comprising a display region and a peripheral region surrounding the display region; a plurality of light-emitting elements, configured to emit light to be irradiated to eyes of a user; a lens assembly, disposed on a light-exiting side of the display panel, the lens assembly comprising a lens mount and a lens within the lens mount, a light transmittance of the lens mount being greater than a threshold; and a plurality of photoelectric sensor assemblies in the peripheral region.
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公开(公告)号：US12111554B2
公开(公告)日：2024-10-08
申请号：US17791338
申请日：2021-08-18
Inventor： Hong Liu , Jingyi Xu , Xiaochun Xu , Jiantao Liu , Wanzhi Chen , Chengfu Xu , Bo Li , Yongqiang Zhang , Peng Liu , Ruirui Hao , Yu Feng , Xinguo Wu
IPC: G02F1/1368 , H10K59/124
CPC classification number: G02F1/1368 , H10K59/124
Abstract: The present disclosure provides a display substrate and a display panel, and belongs to the field of display technology. The present display substrate includes a display region and a peripheral region surrounding the display region; the display substrate includes: a base substrate; a plurality of insulating layers sequentially arranged along a direction away from the base substrate; wherein each of the plurality of insulating layers is located in the display region and the peripheral region; one or more protrusion structures arranged between at least two adjacent ones of the plurality of insulating layers and in the peripheral region.
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公开(公告)号：US20240162247A1
公开(公告)日：2024-05-16
申请号：US17772761
申请日：2021-06-29
Applicant: BOE Technology Group Co., Ltd.
Inventor： Fuqiang Li , Zhen Zhang , Zhenyu Zhang , Lizhong Wang , Ce Ning , Yunping Di , Zheng Fang , Jiahui Han , Chenyang Zhang , Yawei Wang , Chengfu Xu
IPC: H01L27/12
CPC classification number: H01L27/1248 , H01L27/1288 , H01L27/1222
Abstract: Disclosed are a thin film transistor and a manufacturing method therefor, a displaying base plate and a displaying apparatus. The thin film transistor includes an active layer, a first insulating layer and a gate layer which are disposed in stack, wherein the active layer includes a source contact area, a drain contact area, and a channel area connecting the source contact area and the drain contact area; the channel area includes a first channel area, a first resistance area and a second channel area sequentially disposed in a first direction; the gate layer includes a first gate and a second gate which are separately disposed; an orthographic projection of the first gate on a plane where the active layer is located covers the first channel area; and an orthographic projection of the second gate on a plane where the active layer is located covers the second channel area.
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公开(公告)号：US20240103328A1
公开(公告)日：2024-03-28
申请号：US17765769
申请日：2021-06-29
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhen Zhang , Fuqiang Li , Zhenyu Zhang , Yunping Di , Lizhong Wang , Zheng Fang , Jiahui Han , Yawei Wang , Chenyang Zhang , Chengfu Xu , Ce Ning , Pengxia Liang , Feihu Zhou , Xianqin Meng , Weiting Peng , Qiuli Wang , Binbin Tong , Rui Huang , Tianmin Zhou , Wei Yang
IPC: G02F1/1368 , G02F1/1362 , H01L27/12
CPC classification number: G02F1/1368 , G02F1/136286 , H01L27/124 , H01L27/1248 , H01L27/1259
Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.
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