公开(公告)号：US20190062146A1

公开(公告)日：2019-02-28

申请号：US16106542

申请日：2018-08-21

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Tom HANLEY ,  Colin Robert JENKINS

IPC: B81B3/00 ,  B81B7/00

Abstract: The application describes a MEMS transducer comprising a membrane which comprises an active membrane region and a substrate having a cavity. An upper surface of the substrate comprises an overlap region which underlies the membrane. A first portion of the overlap region is provided with at least one recess. The at least one recess does not intersect an edge of the cavity.

公开(公告)号：US20180002168A1

公开(公告)日：2018-01-04

申请号：US15543492

申请日：2016-01-25

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Scott Lyall CARGILL ,  Colin Robert JENKINS ,  Euan James BOYD ,  Richard Ian LAMING

IPC: B81C1/00 ,  H04R19/00 ,  H04R19/04

CPC classification number: B81C1/00666 ,  B81B3/0021 ,  B81B3/0072 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81C1/00182 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15151 ,  H04R19/005 ,  H04R19/04 ,  H01L2924/00014

Abstract: The application describes MEMS transducer having a flexible membrane and which seeks to alleviate and/or redistribute stresses within the membrane layer. A membrane having a first/active region and a second/inactive region is described.

公开(公告)号：US20180002161A1

公开(公告)日：2018-01-04

申请号：US15636887

申请日：2017-06-29

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Colin Robert JENKINS ,  Scott Lyall CARGILL ,  Clive Robert GRAHAM

IPC: B81B3/00 ,  B81C1/00 ,  B81C3/00 ,  H04R31/00 ,  H04R19/04

CPC classification number: B81B3/0021 ,  B81B3/0078 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/04 ,  B81C1/00158 ,  B81C3/001 ,  H04R7/04 ,  H04R19/005 ,  H04R19/04 ,  H04R31/003 ,  H04R31/006 ,  H04R2201/003 ,  H04R2499/15

Abstract: The present application describes MEMS transducer having a membrane and a membrane electrode. The membrane and membrane electrode form a two-layer structure. The membrane electrode is in the form of a lattice of conductive material. The pitch of the lattice and/or the size of the openings varies from a central region of the membrane electrode to a region laterally outside the central region.

公开(公告)号：US20180002160A1

公开(公告)日：2018-01-04

申请号：US15636825

申请日：2017-06-29

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Marek Sebastian PIECHOCINSKI ,  Colin Robert JENKINS ,  Clive Robert GRAHAM

IPC: B81B3/00 ,  B81C1/00 ,  H01L41/09 ,  B81C3/00 ,  H04R31/00 ,  H04R19/04

CPC classification number: B81B3/0021 ,  B81B3/0072 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81B2203/04 ,  B81C1/00158 ,  B81C3/001 ,  H01L41/0973 ,  H04R1/04 ,  H04R1/06 ,  H04R19/005 ,  H04R19/04 ,  H04R31/003 ,  H04R31/006 ,  H04R2201/003 ,  H04R2499/15

Abstract: The application describes MEMS transducer structures comprising a membrane structure having a flexible membrane layer and at least one electrode layer. The electrode layer is spaced from the flexible membrane layer such that at least one air volume extends between the material of the electrode layer and the membrane layer. The electrode layer is supported relative to the flexible membrane by means of a support structure which extends between the first electrode layer and the flexible membrane layer.