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公开(公告)号:US08803295B2
公开(公告)日:2014-08-12
申请号:US13371459
申请日:2012-02-12
Applicant: Ching-Sheng Chen
Inventor: Ching-Sheng Chen
IPC: H01L21/00
CPC classification number: H05K3/28 , H05K3/062 , H05K2201/0338
Abstract: A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. A covering layer is formed on the surface passivation layer, and the covering layer covers the surface passivation layer.
Abstract translation: 提供一种电路结构的制造方法。 提供具有上表面的金属层。 在金属层上形成表面钝化层。 表面钝化层暴露金属层的上表面的一部分,并且金属层的材料不同于表面钝化层的材料。 在表面钝化层上形成覆盖层,覆盖层覆盖表面钝化层。
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公开(公告)号:US20140000109A1
公开(公告)日:2014-01-02
申请号:US13600222
申请日:2012-08-31
Applicant: Ching-Sheng Chen
Inventor: Ching-Sheng Chen
IPC: H01K3/10
CPC classification number: H05K3/244 , H05K3/42 , H05K3/428 , Y10T29/49128 , Y10T29/49146 , Y10T29/49155 , Y10T29/49165 , Y10T29/49169
Abstract: A manufacturing method of substrate structure is provided. A base material having a core layer, a first patterned copper layer, a second patterned copper layer and at least one conductive via is provided. The first and second patterned copper layers are respectively located on a first surface and a second surface of the core layer. The conductive via passes through the core layer and connects the first and second patterned copper layers. A first and a second solder mask layers are respectively formed on the first and second surfaces. Portions of the first and second patterned copper layers are exposed by the first and second solder mask layers, respectively. A first gold layer is formed on the first and second patterned copper layers exposed by the first and second solder mask layers. A nickel layer and a second gold layer are successively formed on the first gold layer.
Abstract translation: 提供了一种基板结构的制造方法。 提供具有芯层,第一图案化铜层,第二图案化铜层和至少一个导电通孔的基材。 第一和第二图案化铜层分别位于芯层的第一表面和第二表面上。 导电通孔穿过芯层并连接第一和第二图案化的铜层。 第一和第二焊料掩模层分别形成在第一和第二表面上。 第一和第二图案化铜层的部分分别由第一和第二焊料掩模层暴露。 在由第一和第二焊料掩模层暴露的第一和第二图案化铜层上形成第一金层。 在第一金层上依次形成镍层和第二金层。
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公开(公告)号:US20130323927A1
公开(公告)日:2013-12-05
申请号:US13961844
申请日:2013-08-07
Applicant: Ching-Sheng Chen
Inventor: Ching-Sheng Chen
IPC: H01L21/768
CPC classification number: H01L21/7685 , B82Y10/00 , H05K3/062 , H05K2201/0338
Abstract: A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. The metal layer and the surface passivation layer are dipped into a modifier, and the modifier is selectively absorbed and attached to the surface passivation layer, so as to form a covering layer. The covering layer has a plurality of nanoparticles and covers the surface passivation layer.
Abstract translation: 提供一种电路结构的制造方法。 提供具有上表面的金属层。 在金属层上形成表面钝化层。 表面钝化层暴露金属层的上表面的一部分,并且金属层的材料不同于表面钝化层的材料。 将金属层和表面钝化层浸入改性剂中,并且改性剂被选择性地吸收并附着到表面钝化层,以形成覆盖层。 覆盖层具有多个纳米颗粒并覆盖表面钝化层。
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公开(公告)号:US20120282738A1
公开(公告)日:2012-11-08
申请号:US13160501
申请日:2011-06-14
Applicant: Ching-Sheng Chen
Inventor: Ching-Sheng Chen
CPC classification number: H01L21/7685 , B82Y10/00 , H05K3/062 , H05K2201/0338
Abstract: A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. The metal layer and the surface passivation layer are dipped into a modifier, and the modifier is selectively absorbed and attached to the surface passivation layer, so as to form a covering layer. The covering layer has a plurality of nanoparticles and covers the surface passivation layer.
Abstract translation: 提供一种电路结构的制造方法。 提供具有上表面的金属层。 在金属层上形成表面钝化层。 表面钝化层暴露金属层的上表面的一部分,并且金属层的材料不同于表面钝化层的材料。 将金属层和表面钝化层浸入改性剂中,并且改性剂被选择性地吸收并附着到表面钝化层,以形成覆盖层。 覆盖层具有多个纳米颗粒并覆盖表面钝化层。
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公开(公告)号:US20120280371A1
公开(公告)日:2012-11-08
申请号:US13371459
申请日:2012-02-12
Applicant: Ching-Sheng Chen
Inventor: Ching-Sheng Chen
CPC classification number: H05K3/28 , H05K3/062 , H05K2201/0338
Abstract: A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. A covering layer is formed on the surface passivation layer, and the covering layer covers the surface passivation layer.
Abstract translation: 提供一种电路结构的制造方法。 提供具有上表面的金属层。 在金属层上形成表面钝化层。 表面钝化层暴露金属层的上表面的一部分,并且金属层的材料不同于表面钝化层的材料。 在表面钝化层上形成覆盖层,覆盖层覆盖表面钝化层。
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公开(公告)号:US09433099B2
公开(公告)日:2016-08-30
申请号:US14072803
申请日:2013-11-06
Applicant: Chin-Sheng Wang , Ching-Sheng Chen , Chao-Min Wang
Inventor: Chin-Sheng Wang , Ching-Sheng Chen , Chao-Min Wang
CPC classification number: H05K3/007 , H01L2224/48091 , H01L2224/48228 , H01L2924/15311 , H05K3/3452 , H05K2201/0376 , H05K2203/0156 , H01L2924/00014
Abstract: A package carrier including a removable supporting plate and a circuit board is provided. The removable supporting plate includes a dielectric layer, a copper foil layer and a releasing layer. The dielectric layer is disposed between the copper foil layer and the releasing layer. The circuit board is disposed on the removable supporting plate and directly contacts the releasing layer. A thickness of the circuit board is between 30 μm and 100 μm.
Abstract translation: 提供一种包括可拆卸支撑板和电路板的封装载体。 可移除的支撑板包括介电层,铜箔层和释放层。 介电层设置在铜箔层和释放层之间。 电路板设置在可拆卸的支撑板上并直接接触释放层。 电路板的厚度在30μm和100μm之间。
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公开(公告)号:US20140345841A1
公开(公告)日:2014-11-27
申请号:US13935580
申请日:2013-07-05
Applicant: Ching-Sheng Chen
Inventor: Ching-Sheng Chen
IPC: F28F21/04
CPC classification number: F28D15/046 , F28F21/04 , H01L23/3735 , H01L23/427 , H01L2224/48091 , H01L2224/48137 , H01L2924/00014
Abstract: A heat dissipation plate including a heat-conductive material layer, a first metal layer, a metal substrate, and a metal ring frame is provided. The heat-conductive material layer has an upper surface and a lower surface opposite to each other. A material of the heat-conductive material layer includes ceramic or silicon germanium. The first metal layer is disposed on the lower surface of the heat-conductive material layer and has a first rough surface structure. The metal substrate is disposed below the first metal layer and has a second rough surface structure. The metal ring frame is disposed between the first metal layer and the metal substrate. The first rough surface structure, the metal ring frame, and the second rough surface structure define a fluid chamber, and a working fluid flows in the fluid chamber.
Abstract translation: 提供了包括导热材料层,第一金属层,金属基板和金属环框架的散热板。 导热材料层具有彼此相对的上表面和下表面。 导热材料层的材料包括陶瓷或硅锗。 第一金属层设置在导热材料层的下表面上并且具有第一粗糙表面结构。 金属基板设置在第一金属层下方并具有第二粗糙表面结构。 金属环框架设置在第一金属层和金属基板之间。 第一粗糙表面结构,金属环框架和第二粗糙表面结构限定流体室,并且工作流体在流体室中流动。
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公开(公告)号:US20140014396A1
公开(公告)日:2014-01-16
申请号:US13546503
申请日:2012-07-11
Applicant: Ching-Sheng Chen
Inventor: Ching-Sheng Chen
IPC: H02G1/00
CPC classification number: H02G3/045 , H02G3/0418
Abstract: A cable management device used in a chassis includes a frame and two board-like cable management units are respectively connected to two sides of the frame. Each cable management unit has multiple recesses. The cables of each of the ports are located in the corresponding recesses to avoid the cables from being in contact with each other and have better heat dissipating feature.
Abstract translation: 在机架中使用的电缆管理装置包括框架,并且两个板状电缆管理单元分别连接到框架的两侧。 每个电缆管理单元都有多个凹槽。 每个端口的电缆位于相应的凹槽中,以避免电缆彼此接触并具有更好的散热特征。
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公开(公告)号:US08552303B2
公开(公告)日:2013-10-08
申请号:US13160501
申请日:2011-06-14
Applicant: Ching-Sheng Chen
Inventor: Ching-Sheng Chen
IPC: H05K1/00
CPC classification number: H01L21/7685 , B82Y10/00 , H05K3/062 , H05K2201/0338
Abstract: A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. The metal layer and the surface passivation layer are dipped into a modifier, and the modifier is selectively absorbed and attached to the surface passivation layer, so as to form a covering layer. The covering layer has a plurality of nanoparticles and covers the surface passivation layer.
Abstract translation: 提供一种电路结构的制造方法。 提供具有上表面的金属层。 在金属层上形成表面钝化层。 表面钝化层暴露金属层的上表面的一部分,并且金属层的材料不同于表面钝化层的材料。 将金属层和表面钝化层浸入改性剂中,并且改性剂被选择性地吸收并附着到表面钝化层,以形成覆盖层。 覆盖层具有多个纳米颗粒并覆盖表面钝化层。
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公开(公告)号:US20120175044A1
公开(公告)日:2012-07-12
申请号:US13426619
申请日:2012-03-22
Applicant: Chin-Sheng Wang , Ching-Sheng Chen , Chien-Hung Wu
Inventor: Chin-Sheng Wang , Ching-Sheng Chen , Chien-Hung Wu
CPC classification number: C25D5/16 , B32B15/08 , B32B37/02 , B32B2307/302 , B32B2457/08 , C25D5/10 , H01L2924/0002 , H05K1/05 , H05K3/421 , H05K2201/0338 , Y10T428/12535 , H01L2924/00
Abstract: A thermal conductivity substrate including a metal substrate, a metal layer, an insulating layer, a plurality of conductive structures, a first conductive layer and a second conductive layer is provided. The metal layer is disposed on the metal substrate and entirely covers the metal substrate. The insulating layer is disposed on the metal layer. The conductive structures are embedded in the insulating layer and connected to a portion of the metal layer. The first conductive layer is disposed on the insulating layer. The second conductive layer is disposed on the first conductive layer and the conductive structures. The second conductive layer is electrically connected to a portion of the metal layer through the conductive structures. The second conductive layer and the conductive structures are integrally formed.
Abstract translation: 提供了包括金属基板,金属层,绝缘层,多个导电结构,第一导电层和第二导电层的导热性基板。 金属层设置在金属基板上,完全覆盖金属基板。 绝缘层设置在金属层上。 导电结构嵌入在绝缘层中并连接到金属层的一部分。 第一导电层设置在绝缘层上。 第二导电层设置在第一导电层和导电结构上。 第二导电层通过导电结构电连接到金属层的一部分。 第二导电层和导电结构整体形成。
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