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公开(公告)号:US10156884B2
公开(公告)日:2018-12-18
申请号:US15354018
申请日:2016-11-17
Applicant: INTEL CORPORATION
Inventor: Michael Mishaeli , Ron Gabor , Robert C. Valentine , Alex Gerber , Zeev Sperber
Abstract: Technologies for local power gate (LPG) interfaces for power-aware operations are described. A system on chip (SoC) includes a first functional unit, a second functional unit, and local power gate (LPG) hardware coupled to the first functional unit and the second functional unit. The LPG hardware is to power gate the first functional unit according to local power states of the LPG hardware. The second functional unit decodes a first instruction to perform a first power-aware operation of a specified length, including computing an execution code path for execution. The second functional unit monitors a current local power state of the LPG hardware, selects a code path based on the current local power state, the specified length, and a specified threshold, and issues a hint to the LPG hardware to power up the first functional unit and continues execution of the first power-aware operation without waiting for the first functional unit to be powered up.
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公开(公告)号:US10133620B2
公开(公告)日:2018-11-20
申请号:US15402835
申请日:2017-01-10
Applicant: Intel Corporation
Inventor: Alex Gerber , Yiannakis Sazeides , Arkady Bramnik , Ron Gabor
Abstract: A processor includes physical storage locations, and a register rename unit that includes a plurality of register rename storage structures. At a given time, each of a complete group of physical storage location identifiers is to be stored in one, but only one, of the plurality of register rename storage structures, unless there is an error. Each of the complete group of physical storage location identifiers is to identify a different one of the physical storage locations. The register rename unit is to detect an error when a first value, which is to be equal to an operation on the complete group of the physical storage location identifiers with no errors, is inconsistent with a second value. The second value is to represent the operation on all physical storage location identifiers that are to be stored in the plurality of register rename storage structures at the given time.
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