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公开(公告)号:US20200341545A1
公开(公告)日:2020-10-29
申请号:US16925609
申请日:2020-07-10
Applicant: Intel Corporation
Inventor: Ravindra A. Babu , Sashank Ms , Satyanantha R. Musunuri , Sagar C. Pawar , Kalyan K. Kaipa , Vijayakumar Balakrishnan , Sameer Kp
Abstract: When the speed of head movement exceeds the processing capability of the system, a reduced depiction is displayed. As one example, the resolution may be reduced using coarse pixel shading in order to create a new depiction at the speed of head movement. In accordance with another embodiment, only the region the user is looking at is processed in full resolution and the remainder of the depiction is processed at lower resolution. In still another embodiment, the background depictions may be blurred or grayed out to reduce processing time.
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12.
公开(公告)号:US10747779B2
公开(公告)日:2020-08-18
申请号:US16426029
申请日:2019-05-30
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Prakash Pillai , Raghavendra N , Aneesh A. Tuljapurkar
Abstract: Technologies for synchronized overclocking setting between multiple networked computing devices include a master computing device and multiple slave computing devices communicating over a network. The master computing device establishes a connection with the slave computing devices. Establishing the connection may include synchronizing the slave computing devices with a master time clock of the master computing device. The master computing device determines its own overclocking setting and requests overclocking settings from the slave computing devices. The overclocking settings may include processor frequency, processor voltage, or other overclocking parameters. The master computing device determines a best overclocking setting from its own overclocking setting and the overclocking settings received from the slave computing device. The master computing device advertises the best overclocking setting to the slave computing devices. The slave computing devices may implement the best overclocking setting. Other embodiments are described and claimed.
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13.
公开(公告)号:US10318547B2
公开(公告)日:2019-06-11
申请号:US15481733
申请日:2017-04-07
Applicant: INTEL CORPORATION
Inventor: Sagar C. Pawar , Prakash Pillai , Raghavendra N , Aneesh A. Tuljapurkar
Abstract: Technologies for synchronized overclocking setting between multiple networked computing devices include a master computing device and multiple slave computing devices communicating over a network. The master computing device establishes a connection with the slave computing devices. Establishing the connection may include synchronizing the slave computing devices with a master time clock of the master computing device. The master computing device determines its own overclocking setting and requests overclocking settings from the slave computing devices. The overclocking settings may include processor frequency, processor voltage, or other overclocking parameters. The master computing device determines a best overclocking setting from its own overclocking setting and the overclocking settings received from the slave computing device. The master computing device advertises the best overclocking setting to the slave computing devices. The slave computing devices may implement the best overclocking setting. Other embodiments are described and claimed.
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14.
公开(公告)号:US20180275738A1
公开(公告)日:2018-09-27
申请号:US15467844
申请日:2017-03-23
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Anantha Narayanan , Ravindra A. Babu , Aneesh A. Tuljapurkar
CPC classification number: G06F1/3287 , G06F1/266 , G06F1/325 , G06F13/385 , G06F13/4022 , G06F13/4282
Abstract: An apparatus system is provided which comprises: a port to selectively receive a device external to the apparatus; a port control circuitry to selectively supply power to the port; and a controller to selectively turn on or turn off the port.
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公开(公告)号:US12299189B2
公开(公告)日:2025-05-13
申请号:US18497136
申请日:2023-10-30
Applicant: Intel Corporation
Inventor: Ravindra A. Babu , Sashank Ms , Satyanantha R. Musunuri , Sagar C. Pawar , Kalyan K. Kaipa , Vijayakumar Balakrishnan , Sameer Kp
Abstract: When the speed of head movement exceeds the processing capability of the system, a reduced depiction is displayed. As one example, the resolution may be reduced using coarse pixel shading in order to create a new depiction at the speed of head movement. In accordance with another embodiment, only the region the user is looking at is processed in full resolution and the remainder of the depiction is processed at lower resolution. In still another embodiment, the background depictions may be blurred or grayed out to reduce processing time.
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公开(公告)号:US20220198022A1
公开(公告)日:2022-06-23
申请号:US17132844
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Pannerkumar Rajagopal , Raghavendra N , Prakash Pillai , Ovais Pir
IPC: G06F21/57 , G06F1/18 , G06F21/32 , G06F1/3215 , G06F1/26
Abstract: A power-up scheme for a computing system that applies a biometric sensor (e.g., a fingerprint sensor, eye sensor, etc.) to authenticate a user before enabling power-up of the computing system or to resume transition to a power state (e.g., one of the power states defined by the Advance Configuration and Power Interface (ACPI)). Output of the biometric sensor is compared against data of a registered user for a match. The data may include an original copy of an output of the biometric sensor saved in a non-volatile memory (e.g., serial peripheral interface (SPI) flash device). If a match exists, a logic in the computing system will allow the computing system to power-up. In the absence of a match, the computing system will not be powered up. In some examples, battery charging is also disabled if the match is not found.
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公开(公告)号:US11281764B2
公开(公告)日:2022-03-22
申请号:US16457561
申请日:2019-06-28
Applicant: INTEL CORPORATION
Inventor: Sagar C. Pawar , Panner Kumar , Karunakara Kotary , Ovais F. Pir
IPC: G06F21/44 , G06F21/81 , G01R31/3835 , G01R31/36 , H04L9/32 , G06F9/4401
Abstract: In some examples, an apparatus to authenticate a battery includes a battery voltage monitor to monitor a voltage of the battery. The apparatus to authenticate the battery also includes a voltage source regulator to filter the voltage of the battery and provide the filtered voltage to turn on circuitry to be used to authenticate the battery.
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公开(公告)号:US20200169723A1
公开(公告)日:2020-05-28
申请号:US16696050
申请日:2019-11-26
Applicant: Intel Corporation
Inventor: Ravindra A. Babu , Sagar C. Pawar , Satyanantha R. Musunuri , Sashank Ms , Kalyan K. Kaipa
IPC: H04N13/332 , G06T11/00 , G06T15/00 , H04N13/327 , G06T1/20
Abstract: Systems, apparatuses and methods may provide for technology that includes a substrate, and a display pipeline coupled to the substrate. The display pipeline may to barrel an initial image to form a barreled image.
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公开(公告)号:US10649521B2
公开(公告)日:2020-05-12
申请号:US15494584
申请日:2017-04-24
Applicant: Intel Corporation
Inventor: Ravindra A. Babu , Sashank Sms Ms , Satyanantha R. Musunuri , Sagar C. Pawar , Kalyan K. Kaipa , Vijayakumar Balakrishnan , Sameer Kp
Abstract: When the speed of head movement exceeds the processing capability of the system, a reduced depiction is displayed. As one example, the resolution may be reduced using coarse pixel shading in order to create a new depiction at the speed of head movement. In accordance with another embodiment, only the region the user is looking at is processed in full resolution and the remainder of the depiction is processed at lower resolution. In still another embodiment, the background depictions may be blurred or grayed out to reduce processing time.
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20.
公开(公告)号:US20200125579A1
公开(公告)日:2020-04-23
申请号:US16426029
申请日:2019-05-30
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Prakash Pillai , Raghavendra N , Aneesh A. Tuljapurkar
Abstract: Technologies for synchronized overclocking setting between multiple networked computing devices include a master computing device and multiple slave computing devices communicating over a network. The master computing device establishes a connection with the slave computing devices. Establishing the connection may include synchronizing the slave computing devices with a master time clock of the master computing device. The master computing device determines its own overclocking setting and requests overlocking settings from the slave computing devices. The overclocking settings may include processor frequency, processor voltage, or other overclocking parameters. The master computing device determines a best overclocking setting from its own overclocking setting and the overclocking settings received from the slave computing device. The master computing device advertises the best overclocking setting to the slave computing devices. The slave computing devices may implement the best overclocking setting. Other embodiments are described and claimed.
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