公开(公告)号：US20190200446A1

公开(公告)日：2019-06-27

申请号：US16329200

申请日：2016-09-28

Applicant: Intel Corporation

Inventor： Brian J. Long

IPC: H05K1/02 ,  G06F1/20 ,  H05K7/20 ,  G06F1/18 ,  H05K1/18 ,  H05K1/14 ,  H05K3/36 ,  H01L23/367

CPC classification number: H05K1/0204 ,  G06F1/181 ,  G06F1/203 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/4006 ,  H01L23/427 ,  H01L23/49816 ,  H01L23/5385 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15321 ,  H05K1/0209 ,  H05K1/021 ,  H05K1/0215 ,  H05K1/144 ,  H05K1/181 ,  H05K3/36 ,  H05K7/20336 ,  H05K7/20818 ,  H05K2201/0367 ,  H05K2201/042 ,  H05K2201/064 ,  H05K2201/066 ,  H05K2201/1028 ,  H05K2201/1034 ,  H05K2201/10378 ,  H05K2201/10393 ,  H05K2201/10409 ,  H05K2201/10734 ,  H01L2924/014 ,  H01L2224/29099

Abstract: Aspects of the embodiments include an edge card and methods of making the same. The edge card can include a printed circuit board (PCB) comprising a first end and a second end, the first end comprising a plurality of metal contact fingers configured to interface with an edge connector, and the second end comprising a through-hole configured to mate with a post of a screw, the PCB further comprising an aperture proximate the second end of the PCB. The PCB can also include a thermal conduction element secured to the PCB, the thermal conduction element supporting an integrated circuit package, the integrated circuit package received by the aperture, wherein the thermal conduction element contacts the PCB proximate the through-hole and the thermal conduction element is configured to conduct heat from the integrated circuit towards the second portion of the printed circuit board.

公开(公告)号：US20180138133A1

公开(公告)日：2018-05-17

申请号：US15870708

申请日：2018-01-12

Applicant: Intel Corporation

Inventor： John G. Meyers ,  Bilal Khalaf ,  Sireesha Gogineni ,  Brian J. Long

IPC: H01L23/58 ,  H01L21/66 ,  H01L23/13 ,  H01L23/31 ,  H01L21/52 ,  H01L25/065 ,  H01L25/16 ,  H01L25/00 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/585 ,  H01L21/52 ,  H01L22/32 ,  H01L22/34 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/50 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/1433 ,  H01L2924/1436 ,  H01L2924/15162 ,  H01L2924/15192 ,  H01L2924/1531 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15333 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: Techniques and mechanisms to facilitate connection with one or more integrated circuit (IC) dies of a packaged device. In an embodiment, the packaged device includes a first substrate coupled to a first side of a package, and a second substrate coupled to a second side of the package opposite the first side. Circuitry, coupled via the first substrate to one or more IC dies disposed in the package, includes a circuit structure disposed at a cantilever portion of the first substrate. The cantilever portion extends past one or both of an edge of the first side and an edge of the second side. In another embodiment, a hardware interface disposed on the second substrate enables coupling of the packaged device to another device.