公开(公告)号：US20240206067A1

公开(公告)日：2024-06-20

申请号：US18533338

申请日：2023-12-08

Applicant: DENSO CORPORATION

Inventor： HIROYOSHI KUNIEDA ,  YUICHIRO SASAKI ,  MASASHI HIRAMATSU

IPC: H05K1/14 ,  H05K1/18

CPC classification number: H05K1/141 ,  H05K1/144 ,  H05K1/181 ,  H05K2201/0367 ,  H05K2201/10189

Abstract: An electronic device includes first, second, and third circuit components, a reinforcing member, and electrical connectors. The second circuit component includes a surface on which the first circuit component mounts. The second circuit component is electrically connected to the first circuit component. The reinforcing member is in contact with the first circuit component and the surface of the second circuit component, and reinforces a connection between the first and second circuit components. The third circuit component has a mounting surface on which the second circuit component mounts, and is electrically connected the second circuit component. The electrical connectors include at least one electrical connecting portion establishing an electrical connection between the second circuit component and the third circuit component. At least one section of each of the electrical connectors is outside a member facing portion facing the reinforcing member.

公开(公告)号：US12010794B2

公开(公告)日：2024-06-11

申请号：US17709492

申请日：2022-03-31

Applicant: IBIDEN CO., LTD.

Inventor： Satoru Kawai

IPC: H05K1/11 ,  H05K3/40

CPC classification number: H05K1/11 ,  H05K3/4007 ,  H05K2201/0341 ,  H05K2201/0367 ,  H05K2203/043

Abstract: A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer and including conductor pads, a solder resist layer formed on the base insulating layer such that the solder resist layer is covering the conductor layer and having openings exposing the conductor pads, respectively, and plating bumps formed on the conductor pads such that each of the plating bumps includes a base plating layer formed in a respective one of the openings of the solder resist layer, and a top plating layer formed on the base plating layer. The plating bumps are formed such that the base plating layer has an upper surface and a side surface including a portion protruding from the solder resist layer and having a rough surface and that the top plating layer has a hemispherical shape and is covering only the upper surface of the base plating layer.

公开(公告)号：US20240040698A1

公开(公告)日：2024-02-01

申请号：US18097661

申请日：2023-01-17

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sang Min AHN

IPC: H05K1/11 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K1/115 ,  H05K3/4007 ,  H05K3/4647 ,  H05K2201/0367 ,  H05K2201/10674 ,  H05K2201/096 ,  H05K2201/09563

Abstract: A printed circuit board includes a substrate including a plurality of wiring layers; a first metal post disposed on the substrate and connected to at least a portion of an uppermost wiring layer among the plurality of wiring layers; a second metal post disposed on the substrate and connected to at least another portion of the uppermost wiring layer among the plurality of wiring layers; a resist layer disposed on the substrate and embedding at least a portion of each of the first and second metal posts; and a metal via penetrating through the resist layer on the second metal post and connected to the second metal post.

公开(公告)号：US20190037708A1

公开(公告)日：2019-01-31

申请号：US16072367

申请日：2016-04-01

Applicant: INTEL CORPORATION

Inventor： Sandeep SANE ,  Timothy SWETTLEN

IPC: H05K3/40 ,  H01L23/498 ,  H05K3/34

CPC classification number: H05K3/4015 ,  H01L23/32 ,  H01L23/49816 ,  H01L23/49833 ,  H05K3/3436 ,  H05K2201/0367 ,  H05K2201/09509 ,  H05K2201/10734

Abstract: The systems and methods described herein are directed to using a plurality of interface elements (e.g., sockets) and/or stud-bump elements embedded into board substrates (e.g., a motherboard) to enable the interchange of variable configuration components (e.g., electronic components, chips, and the like) that are mounted on package substrates having ball grid arrays (BGAs). In some aspects, this interchange can be accomplished while leaving the pre-existing board substrate design and various peripheral system components of the board substrate unchanged.

公开(公告)号：US20180343740A1

公开(公告)日：2018-11-29

申请号：US16051524

申请日：2018-08-01

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Shingo ITO

IPC: H05K1/11 ,  H05K1/14 ,  H05K3/46

CPC classification number: H05K1/118 ,  H05K1/14 ,  H05K1/144 ,  H05K3/361 ,  H05K3/368 ,  H05K3/46 ,  H05K3/4638 ,  H05K2201/0367 ,  H05K2201/041 ,  H05K2203/167

Abstract: A composite substrate includes a flat cable and a mounting board. The flat cable includes a first end portion and a second end portion, and a first bonding portion, a circuit portion, and a second bonding portion in this order in the length direction from the first end portion toward the second end portion. A positioning hole is disposed between the first end portion and the first bonding portion in the length direction. Another positioning hole is disposed between the second end portion and the second bonding portion in the length direction. The mounting board includes a mounting land conductor and a convex portion. The convex portion is fitted in the positioning hole. The mounting land conductor is bonded by surface mounting to an external connection conductor of the first bonding portion and an external connection conductor of the second bonding portion.

公开(公告)号：US10014270B2

公开(公告)日：2018-07-03

申请号：US15215350

申请日：2016-07-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Min Liang ,  Jiun Yi Wu

IPC: H01L21/00 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H05K3/40 ,  H01L25/065 ,  H01L25/00 ,  H05K1/11 ,  H05K3/46

CPC classification number: H01L24/16 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49866 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16157 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2225/06513 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K1/111 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014

Abstract: An embodiment apparatus includes a dielectric layer, a conductive trace in the dielectric layer, and a bump pad. The conductive trace includes a first portion having an exposed top surface, wherein the exposed top surface is recessed from a top surface of the dielectric layer. Furthermore, the bump pad is disposed over and is electrically connected to a second portion of the conductive trace.

公开(公告)号：US09992865B2

公开(公告)日：2018-06-05

申请号：US15045544

申请日：2016-02-17

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Tae-Hong Min ,  Myung-Sam Kang ,  Young-Gwan Ko ,  Min-Jae Seong

IPC: H05K7/00 ,  H05K1/02 ,  H01L23/13 ,  H01L23/498 ,  H01L23/00 ,  H05K1/11 ,  H05K3/46

CPC classification number: H05K1/0298 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/00 ,  H05K1/113 ,  H05K3/4608 ,  H05K2201/0195 ,  H05K2201/0367 ,  H05K2201/09672 ,  H05K2201/09872 ,  H05K2201/10674

Abstract: A circuit board and an assembly including the circuit board are provided. The circuit board includes a first insulation layer, a first conductive pattern disposed on the first insulation layer, an insulation film disposed on the first conductive pattern, and a second conductive pattern disposed on the insulation film. The insulation film includes an insulation thin film contacting the first conductive pattern, and a function film disposed on the insulation thin film and contacting the second conductive pattern.

公开(公告)号：US09914065B2

公开(公告)日：2018-03-13

申请号：US14917564

申请日：2014-09-03

Applicant: BRIXO SMART TOYS LTD.

Inventor： Boaz Almog ,  Amir Saraf

IPC: A63H33/04 ,  A63H33/08 ,  H05K1/02 ,  H05K1/11 ,  H05K3/32

CPC classification number: A63H33/042 ,  A63H33/086 ,  H05K1/0284 ,  H05K1/119 ,  H05K3/326 ,  H05K2201/0367 ,  H05K2201/09045 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2201/0999 ,  H05K2201/209

Abstract: The present invention relates to a selectively conductive toy building element, comprising: a body adapted for releasable engagement to at least one other toy building element body or to a corresponding baseplate, the body including at least one conductive portion having at least one contact area adapted to generate pressure on a conductive portion or contact area of an adjacent toy building element body, in such a way that ensures electrical conduction between said toy building elements in a desired location and direction.

公开(公告)号：US20180063953A1

公开(公告)日：2018-03-01

申请号：US15677395

申请日：2017-08-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jung Yun JO ,  Jeong Do YANG

IPC: H05K1/11 ,  H05K3/18 ,  H05K3/28 ,  H05K3/40

CPC classification number: H05K1/111 ,  H05K1/0313 ,  H05K1/09 ,  H05K3/188 ,  H05K3/28 ,  H05K3/36 ,  H05K3/4007 ,  H05K2201/0314 ,  H05K2201/0367 ,  H05K2201/09045 ,  H05K2201/0939 ,  H05K2201/10128 ,  H05K2201/10136 ,  H05K2203/0723

Abstract: A circuit board, a display device including the same, and a method of manufacturing a circuit board are provided. A circuit board includes a base substrate, a wiring line provided on the base substrate, a passivation layer provided on the wiring line, an elastic bump provided on the passivation layer, and a conductive layer provided on the elastic bump. The passivation layer includes a first opening and a second opening that expose a partial region of the wiring line, and the second opening is arranged in a region adjacent to the first opening.

公开(公告)号：US20180054888A1

公开(公告)日：2018-02-22

申请号：US15681948

申请日：2017-08-21

Applicant: IBIDEN CO., LTD.

Inventor： Teruyuki ISHIHARA ,  Hiroyuki BAN ,  Haiying MEI

IPC: H05K1/02

CPC classification number: H05K1/0284 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2924/15174 ,  H05K1/0296 ,  H05K3/007 ,  H05K3/205 ,  H05K3/3436 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/10674

Abstract: A printed wiring board includes a support plate, a laminate formed on the support plate and including first conductor pads on a first surface side of the laminate and second conductor pads on a second surface side of the laminate, and a solder resist layer interposed between the support plate and the laminate and having openings formed such that the openings are exposing the first conductor pads respectively. The laminate includes a resin insulating layer and has a first surface on the first surface side and a second surface on the second surface side on the opposite side with respect to the first surface of the laminate, the second conductor pads are embedded in the second surface of the laminate such that the second conductor pads have surfaces exposed from the second surface of the laminate respectively.