公开(公告)号：US10404994B2

公开(公告)日：2019-09-03

申请号：US15960120

申请日：2018-04-23

Applicant: Intel Corporation

Inventor： Yi-Jen Chiu ,  Lidong Xu ,  Hong Jiang

IPC: H04N19/52 ,  H04N19/577 ,  H04N19/56 ,  H04N19/44 ,  H04N19/51

Abstract: Method and apparatus for deriving a motion vector at a video decoder. A block-based motion vector may be produced at the video decoder by utilizing motion estimation among available pixels relative to blocks in one or more reference frames. The available pixels could be, for example, spatially neighboring blocks in the sequential scan coding order of a current frame, blocks in a previously decoded frame, or blocks in a downsampled frame in a lower pyramid when layered coding has been used.

公开(公告)号：US10171808B2

公开(公告)日：2019-01-01

申请号：US15084858

申请日：2016-03-30

Applicant: Intel Corporation

Inventor： Yi-Jen Chiu ,  Lidong Xu

IPC: G06K9/40 ,  H04N19/117 ,  H04N19/172 ,  H04N19/61 ,  H04N19/136 ,  H04N19/177 ,  H04N19/17 ,  H04N19/82 ,  H04N19/176 ,  H04N19/182 ,  H04N19/65 ,  H04N19/157 ,  H04N19/18 ,  H04N19/86

Abstract: A video encoder may use an adaptive Wiener filter inside the core video encoding loop to improve coding efficiency. In one embodiment, the Wiener filter may be on the input to a motion estimation unit and, in another embodiment, it may be on the output of a motion compensation unit. The taps for the Wiener filter may be determined based on characteristics of at least a region of pixel intensities within a picture. Thus, the filtering may be adaptive in that it varies based on the type of video being processed.

公开(公告)号：US10165273B2

公开(公告)日：2018-12-25

申请号：US14959417

申请日：2015-12-04

Applicant: Intel Corporation

Inventor： Yi-Jen Chiu ,  Lidong Xu

IPC: G06K9/40 ,  H04N19/117 ,  H04N19/172 ,  H04N19/61 ,  H04N19/136 ,  H04N19/177 ,  H04N19/17 ,  H04N19/82 ,  H04N19/176 ,  H04N19/182 ,  H04N19/65 ,  H04N19/157 ,  H04N19/18 ,  H04N19/86

Abstract: A video encoder may use an adaptive Wiener filter inside the core video encoding loop to improve coding efficiency. In one embodiment, the Wiener filter may be on the input to a motion estimation unit and, in another embodiment, it may be on the output of a motion compensation unit. The taps for the Wiener filter may be determined based on characteristics of at least a region of pixel intensities within a picture. Thus, the filtering may be adaptive in that it varies based on the type of video being processed.

公开(公告)号：US09661322B2

公开(公告)日：2017-05-23

申请号：US13991592

申请日：2012-09-24

Applicant: Intel Corporation

Inventor： Lidong Xu ,  Yi-Jen Chiu ,  Wenhao Zhang ,  Hong Jiang

IPC: H04N7/12 ,  H04N19/117 ,  H04N19/147 ,  H04N19/186 ,  H04N19/46 ,  H04N19/61 ,  H04N19/136 ,  H04N19/82

CPC classification number: H04N19/117 ,  H04N19/136 ,  H04N19/147 ,  H04N19/186 ,  H04N19/46 ,  H04N19/61 ,  H04N19/82

Abstract: Reconstructed picture quality for a video codec system may be improved by categorizing reconstructed pixels into different histogram bins with histogram segmentation and then applying different filters on different bins. Histogram segmentation may be performed by averagely dividing the histogram into M bins or adaptively dividing the histogram into N bins based on the histogram characteristics. Here M and N may be a predefined, fixed, non-negative integer value or an adaptively generated value at encoder side and may be sent to decoder through the coded bitstream.

公开(公告)号：US09596465B2

公开(公告)日：2017-03-14

申请号：US13856212

申请日：2013-04-03

Applicant: Intel Corporation

Inventor： Wenhao Zhang ,  Yi-Jen Chiu ,  Lidong Xu ,  Zhipin Deng ,  Yu Han ,  Xiaoxia Cai ,  Hong Jiang

IPC: H04N19/503 ,  H04N19/61 ,  H04N19/117 ,  H04N19/33 ,  H04N19/59 ,  H04N11/04 ,  H04N7/32

CPC classification number: H04N19/159 ,  H04N19/105 ,  H04N19/117 ,  H04N19/14 ,  H04N19/176 ,  H04N19/182 ,  H04N19/184 ,  H04N19/33 ,  H04N19/503 ,  H04N19/59 ,  H04N19/61

Abstract: Techniques involving inter layer prediction of scalable video coding are described. Such techniques may employ refining filters.

Abstract translation: 描述了涉及可伸缩视频编码的层间预测的技术。 这种技术可以采用精炼过滤器。

公开(公告)号：US09584822B2

公开(公告)日：2017-02-28

申请号：US14578990

申请日：2014-12-22

Applicant: INTEL CORPORATION

Inventor： Zhipin Deng ,  Yi-Jen Chiu ,  Lidong Xu ,  Wenhao Zhang ,  Yu Han ,  Xiaoxia Cai

IPC: H04N19/51 ,  H04N13/00 ,  H04N19/597 ,  H04N19/30 ,  H04N19/463 ,  H04N19/176 ,  H04N19/119 ,  H04N19/122 ,  H04N19/61 ,  H04N19/96 ,  H04N19/103 ,  H04N19/157 ,  H04N19/187

CPC classification number: H04N19/51 ,  H04N13/161 ,  H04N19/103 ,  H04N19/119 ,  H04N19/122 ,  H04N19/157 ,  H04N19/176 ,  H04N19/187 ,  H04N19/30 ,  H04N19/463 ,  H04N19/597 ,  H04N19/61 ,  H04N19/96

Abstract: A three-dimensional (3D) video codec encodes multiple views of a 3D video, each including texture and depth components. The encoders of the codec encode video blocks of their respective views based on a set of prediction parameters, such as quad-tree split flags, prediction modes, partition sizes, motion fields, inter directions, reference indices, luma intra modes, and chroma intra modes. The prediction parameters may be inherited across different views and different ones of the texture and depth components.

公开(公告)号：US09313497B2

公开(公告)日：2016-04-12

申请号：US13709780

申请日：2012-12-10

Applicant: Intel Corporation

Inventor： Yi-Jen Chiu ,  Wenhao Zhang ,  Lidong Xu ,  Yu Han ,  Hong Jiang

IPC: H04N7/12 ,  H04N19/60 ,  H04N19/159 ,  H04N19/176 ,  H04N19/132 ,  H04N19/154 ,  H04N19/48

CPC classification number: H04N19/60 ,  H04N19/132 ,  H04N19/154 ,  H04N19/159 ,  H04N19/176 ,  H04N19/48

Abstract: Video compression encoding includes intra and inter prediction to reduce spatial and temporal redundancies in video. Prediction results or residuals represent differences between original video pixel values and predicted pixel values. The prediction residuals may be transformed into coefficients, referred to as transform coefficients, in the frequency domain. The transform coefficients may be quantized and entropy encoded. The transform coefficients can be sub-sampled prior to quantization to reduce their number. For example, sub-sampling may reduce more high frequency components than low frequency components represented in the transform coefficients. Therefore, sub-sampling reduces the number of transform coefficients that need to be quantized, reduces quantization complexity, and correspondingly increases throughput in the encoding.

Abstract translation: 视频压缩编码包括帧内和帧间预测，以减少视频中的空间和时间冗余。 预测结果或残差表示原始视频像素值与预测像素值之间的差异。 预测残差可以被变换为频域中被称为变换系数的系数。 可以对变换系数进行量化和熵编码。 变换系数可以在量化之前进行子采样以减少它们的数量。 例如，子采样可以减少比变换系数中表示的低频分量更多的高频分量。 因此，子采样减少了需要量化的变换系数的数量，降低了量化复杂度，并且相应地增加了编码中的吞吐量。

公开(公告)号：US12132995B2

公开(公告)日：2024-10-29

申请号：US17793348

申请日：2020-02-17

Applicant: Intel Corporation

Inventor： Huan Dou ,  Lidong Xu ,  Xiaoxia Cai ,  Chen Wang ,  Yi-Jen Chiu

IPC: H04N23/698 ,  G06T5/77 ,  H04N19/597 ,  H04N19/80 ,  H04N19/86

CPC classification number: H04N23/698 ,  G06T5/77 ,  H04N19/597 ,  H04N19/80 ,  H04N19/86 ,  G06T2207/20081 ,  G06T2207/20084

Abstract: An example apparatus for enhancing video includes a decoder to decode a received 360-degree projection format video bitstream to generate a decoded 360-degree projection format video. The apparatus also includes a viewport generator to generate a viewport from the decoded 360-degree projection format video. The apparatus further includes a convolutional neural network (CNN)-based filter to remove an artifact from the viewport to generate an enhanced image. The apparatus further includes a displayer to send the enhanced image to a display.

公开(公告)号：US20240323422A1

公开(公告)日：2024-09-26

申请号：US18680800

申请日：2024-05-31

Applicant: Intel Corporation

Inventor： Jill Boyce ,  Lidong Xu

IPC: H04N19/46 ,  H04N19/136 ,  H04N19/146 ,  H04N19/167 ,  H04N19/172 ,  H04N19/42

CPC classification number: H04N19/46 ,  H04N19/136 ,  H04N19/146 ,  H04N19/167 ,  H04N19/172 ,  H04N19/42

Abstract: Disclosed examples populate a supplemental enhancement information (SEI) message with a value corresponding to a number of subpictures of a video sequence; populate a level indicator in the SEI message; populate a subpicture identifier; populate the subpicture identifier in a slice header, and cause the SEI message and the slice header to be included in a video bitstream.

公开(公告)号：US11861761B2

公开(公告)日：2024-01-02

申请号：US17095590

申请日：2020-11-11

Applicant: Intel Corporation

Inventor： Subramaniam Maiyuran ,  Durgaprasad Bilagi ,  Joydeep Ray ,  Scott Janus ,  Sanjeev Jahagirdar ,  Brent Insko ,  Lidong Xu ,  Abhishek R. Appu ,  James Holland ,  Vasanth Ranganathan ,  Nikos Kaburlasos ,  Altug Koker ,  Xinmin Tian ,  Guei-Yuan Lueh ,  Changliang Wang

IPC: G06T1/60 ,  G06T1/20 ,  G06F12/0802 ,  G06N5/04

CPC classification number: G06T1/60 ,  G06F12/0802 ,  G06N5/04 ,  G06T1/20 ,  G06F2212/251

Abstract: Embodiments described herein are generally directed to improvements relating to power, latency, bandwidth and/or performance issues relating to GPU processing/caching. According to one embodiment, a system includes a producer intellectual property (IP) (e.g., a media IP), a compute core (e.g., a GPU or an AI-specific core of the GPU), a streaming buffer logically interposed between the producer IP and the compute core. The producer IP is operable to consume data from memory and output results to the streaming buffer. The compute core is operable to perform AI inference processing based on data consumed from the streaming buffer and output AI inference processing results to the memory.