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    ELECTRONIC PACKAGE WITH ROTATED SEMICONDUCTOR DIE
    13.
    发明申请
    ELECTRONIC PACKAGE WITH ROTATED SEMICONDUCTOR DIE 有权

    公开(公告)号：US20220108954A1

    公开(公告)日：2022-04-07

    申请号：US17553760

    申请日：2021-12-16

    Applicant: MEDIATEK INC.

    Inventor： Yao-Chun Su ,  Chih-Jung Hsu ,  Yi-Jou Lin ,  I-Hsuan Peng

    IPC: H01L23/538 ,  H01L23/31 ,  H01L23/367 ,  H01L23/00 ,  H01L23/58 ,  H01L23/66 ,  H01L25/065

    Abstract: An electronic package includes a package substrate of a rectangular shape, and a chip package including a first interface circuit die and a second interface circuit die. The first interface circuit die and second interface circuit die are mounted on a redistribution layer structure and encapsulated within a molding compound. The chip package is mounted on a top surface of the package substrate and rotated relative to the package substrate above a vertical axis that is orthogonal to the top surface through a rotation offset angle. A metal ring is mounted on the top surface of the package substrate.

    Semiconductor package structure
    15.
    发明授权
    Semiconductor package structure 有权

    公开(公告)号：US10784211B2

    公开(公告)日：2020-09-22

    申请号：US15906098

    申请日：2018-02-27

    Applicant: MEDIATEK INC.

    Inventor： Tzu-Hung Lin ,  Chia-Cheng Chang ,  I-Hsuan Peng ,  Nai-Wei Liu

    IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L23/043 ,  H01L23/13 ,  H01L23/538

    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a substrate having a first surface and a second surface opposite thereto. The substrate includes a wiring structure. The semiconductor package structure also includes a first semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The semiconductor package structure further includes a second semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The first semiconductor die and the second semiconductor die are separated by a molding material. In addition, the semiconductor package structure includes a first hole and a second hole formed on the second surface of the substrate.

    SEMICONDUCTOR PACKAGE ASSEMBLY HAVING A CONDUCTIVE ELECTROMAGNETIC SHIELD LAYER
    16.
    发明申请
    SEMICONDUCTOR PACKAGE ASSEMBLY HAVING A CONDUCTIVE ELECTROMAGNETIC SHIELD LAYER 审中-公开

    公开(公告)号：US20200168572A1

    公开(公告)日：2020-05-28

    申请号：US16779217

    申请日：2020-01-31

    Applicant: MediaTek Inc.

    Inventor： Tzu-Hung Lin ,  I-Hsuan Peng ,  Nai-Wei Liu ,  Wei-Che Huang ,  Che-Ya Chou

    IPC: H01L23/66 ,  H01L23/538 ,  H01L23/552 ,  H01L23/00 ,  H01L25/16

    Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package including a first redistribution layer (RDL) structure having a first surface and a second surface opposite to the first substrate. The first RDL structure includes a plurality of first conductive traces close to the first surface of the first RDL structure. An antenna pattern is disposed close to the second surface of the first RDL structure. A first semiconductor die is disposed on the first surface of the first RDL structure and electrically coupled to the first RDL structure. A plurality of conductive structures is disposed on the first surface of the first RDL structure and electrically coupled to the first RDL structure. The plurality of conductive structures is spaced apart from the antenna pattern through the plurality of first conductive traces of the first RDL structure.

    SEMICONDUCTOR PACKAGE HAVING A STIFFENER RING
    18.
    发明申请
    SEMICONDUCTOR PACKAGE HAVING A STIFFENER RING 审中-公开

    公开(公告)号：US20190115269A1

    公开(公告)日：2019-04-18

    申请号：US16217016

    申请日：2018-12-11

    Applicant: MEDIATEK INC.

    Inventor： Chi-Wen Pan ,  I-Hsuan Peng ,  Sheng-Liang Kuo ,  Yi-Jou Lin ,  Tai-Yu Chen

    IPC: H01L23/16 ,  H01L23/367 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

    Abstract: A semiconductor package includes a package substrate having a top surface and a bottom surface, and a stiffener ring mounted on the top surface of the package substrate. The stiffener ring includes a reinforcement rib that is coplanar with the stiffener ring on the top surface of the package substrate. At least two compartments are defined by the stiffener ring and the reinforcement rib. At least two individual chip packages are mounted on chip mounting regions within the at least two compartments, respectively, thereby constituting a package array on the package substrate.

    Semiconductor package assembly with embedded IPD
    19.
    发明授权
    Semiconductor package assembly with embedded IPD 有权

    公开(公告)号：US10217724B2

    公开(公告)日：2019-02-26

    申请号：US15047980

    申请日：2016-02-19

    Applicant: MediaTek Inc.

    Inventor： Tzu-Hung Lin ,  I-Hsuan Peng ,  Ching-Wen Hsiao

    IPC: H01L25/065 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L25/10 ,  H01L25/16 ,  H01L23/31 ,  H05K1/18

    Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package including a first semiconductor die. A first redistribution layer (RDL) structure is coupled to the first semiconductor die. The first redistribution layer (RDL) structure includes a first conductive trace disposed at a first layer-level. A second conductive trace is disposed at a second layer-level. A first inter-metal dielectric (IMD) layer and a second inter-metal dielectric (IMD) layer, which is beside the first inter-metal dielectric (IMD) layer, are disposed between the first conductive trace and the second conductive trace.

    Semiconductor package structure having an annular frame with truncated corners
    20.
    发明授权
    Semiconductor package structure having an annular frame with truncated corners 有权

    公开(公告)号：US12142598B2

    公开(公告)日：2024-11-12

    申请号：US18170078

    申请日：2023-02-16

    Applicant: MEDIATEK INC.

    Inventor： Chia-Cheng Chang ,  Tzu-Hung Lin ,  I-Hsuan Peng ,  Yi-Jou Lin

    IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538

    Abstract: A semiconductor package structure includes a substrate having a substrate having a first surface and second surface opposite thereto, wherein the substrate comprises a wiring structure. The structure also has a first semiconductor die disposed on the first surface of the substrate and electrically coupled to the wiring structure, and a second semiconductor die disposed on the first surface and electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged in a side-by-side manner. A molding material surrounds the first semiconductor die and the second semiconductor die, wherein the first semiconductor die is separated from the second semiconductor die by the molding material. Finally, an annular frame mounted on the first surface of the substrate, wherein the annular frame surrounds the first semiconductor die and the second semiconductor die.

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