TRANSMISSION LINE AND ELECTRONIC DEVICE
    11.
    发明公开

    公开(公告)号:US20230290537A1

    公开(公告)日:2023-09-14

    申请号:US18198475

    申请日:2023-05-17

    CPC classification number: H01B7/0225 H01B3/30 H01B7/04

    Abstract: In a transmission line, a signal conductor layer extends in a front-back direction orthogonal to an up-down direction. A ground conductor layer is above the signal conductor layer. When viewed in a first orthogonal direction, first hollow portions are arranged in the front-back direction in a first direction of the signal conductor layer, and second hollow portions are arranged in the front-back direction in a second direction of the signal conductor layer. Each of regions between adjacent first hollow portions in the front-back direction is a first region. Each of regions between adjacent second hollow portions in the front-back direction is a second region. Each of the first hollow portions overlaps with a corresponding one of the second regions when viewed in a second orthogonal direction. Each of the second hollow portions overlaps with a corresponding one of the first regions when viewed in the second orthogonal direction.

    MULTILAYER SUBSTRATE AND METHOD FOR MANUFACTURING SAME

    公开(公告)号:US20220418102A1

    公开(公告)日:2022-12-29

    申请号:US17897747

    申请日:2022-08-29

    Abstract: A multilayer substrate includes a multilayer body in which insulating layers are laminated in a laminating direction, a front electrode that is provided on a front surface side of a first insulating layer which is positioned on a front surface side of the multilayer body among the insulating layers, a first internal electrode that is provided on an opposite side to the front electrode with the first insulating layer interposed therebetween, and a first interlayer connection conductor that electrically connects the front electrode and the first internal electrode with each other. The first interlayer connection conductor includes a front side connection surface that is electrically connected with the front electrode and a back side connection surface that is electrically connected with the first internal electrode.

    ANTENNA ELEMENT, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING ANTENNA ELEMENT

    公开(公告)号:US20240047865A1

    公开(公告)日:2024-02-08

    申请号:US18381671

    申请日:2023-10-19

    CPC classification number: H01Q1/38

    Abstract: An antenna element includes a first opening including an annular outer boundary in an antenna conductor layer. A first insulative substrate non-forming region is provided between an insulative substrate and the antenna conductor layer in an up-down direction. The insulative substrate does not exist in the first insulative substrate non-forming region. The outer boundary of the first opening overlaps one or more first insulative substrate non-forming regions and is not in contact with the insulative substrate. The first insulative substrate non-forming region is a first void, and a low dielectric constant material having a lower dielectric constant than that of a material of the insulative substrate or a high dielectric constant material having a higher dielectric constant than that of the material of the insulative substrate is provided in the first insulative substrate non-forming region.

    CIRCUIT BOARD
    15.
    发明公开
    CIRCUIT BOARD 审中-公开

    公开(公告)号:US20230156913A1

    公开(公告)日:2023-05-18

    申请号:US18096048

    申请日:2023-01-12

    Inventor: Kosuke NISHIO

    CPC classification number: H05K1/0298 H05K1/0242 H05K2201/09727

    Abstract: A circuit board includes a first section on a left side of a third section in a signal-conductor-layer left-right direction and extending in parallel or substantially in parallel with the third section in a signal-conductor-layer front-back direction when viewed in a stacking direction. The first section includes first thin line portions and first thick line portions, each of the first thick line portions has a line width greater than a line width of each of the first thin line portions. The first thin line portions and the first thick line portions are alternately arranged in the signal-conductor-layer front-back direction. In the signal-conductor-layer left-right direction, center lines of the first thin line portions are positioned leftward relative to center lines of the first thick line portions.

    MULTILAYER BOARD AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20230053211A1

    公开(公告)日:2023-02-16

    申请号:US17979032

    申请日:2022-11-02

    Inventor: Kosuke NISHIO

    Abstract: A multilayer board includes thermoplastic resin layers laminated together, a first-class conductor pattern including a conductor foil on a first surface of one of the thermoplastic resin layers, a second-class conductor pattern in contact with a second surface of the one of the thermoplastic resin layers, and an interlayer connection conductor in the one of the thermoplastic resin layers and including a first end surface connected to the first-class conductor pattern and a second end surface connected to a second-class conductor pattern. The second-class conductor pattern and the first interlayer connection conductor include a conductor of a single material including a resin, or a conductor of a single material including a metal with a melting point lower than that of the conductor foil.

    CIRCUIT BOARD AND METHOD OF PRODUCING CIRCUIT BOARD

    公开(公告)号:US20240365477A1

    公开(公告)日:2024-10-31

    申请号:US18765420

    申请日:2024-07-08

    CPC classification number: H05K3/4605 H05K1/0298 H05K3/4652

    Abstract: An interlayer connection conductor is inside a through-hole extending through first and second insulator layers in a Z-axis direction. A first conductor layer is on a negative main surface of an insulator layer farther in a negative direction of the Z-axis than the second insulator layer, and in contact with an end portion of the interlayer connection conductor in the negative direction of the Z-axis. A second conductor layer is on a positive main surface of the second insulator layer and in contact with an end portion of the interlayer connection conductor in a positive direction of the Z-axis. A surface roughness of a portion in the second insulator layer inside the through-hole is larger than a surface roughness of a portion in the first insulator layer inside the through-hole. No conductor layer in contact with the interlayer connection conductor is provided between the first and second insulator layers.

    CIRCUIT BOARD AND METHOD OF MANUFACTURING CIRCUIT BOARD

    公开(公告)号:US20230319980A1

    公开(公告)日:2023-10-05

    申请号:US18204978

    申请日:2023-06-02

    Inventor: Kosuke NISHIO

    CPC classification number: H05K1/024 H05K1/115 H05K3/4652 H01P3/082

    Abstract: A circuit board includes one or more insulator layers, and upper and lower principal surfaces, and conductor layers in or on the substrate body. The conductor layers include a pair of first and second conductor layers on one of the insulator layers. Each of the pairs of the first and second conductor layers includes a first proximity section in which the first and second conductor layers are aligned in an orthogonal direction to an extending direction of the first conductor layer. A distance between the first and second conductor layers in the first proximity section is defined as a proximity distance. Most proximate first and second conductor layers are defined as the first and second conductor layers with a smallest proximity distance and are located on an upper principal surface of a first insulator layer of the one or more insulating layers.

    CIRCUIT BOARD AND METHOD OF MANUFACTURING CIRCUIT BOARD

    公开(公告)号:US20230239996A1

    公开(公告)日:2023-07-27

    申请号:US18127688

    申请日:2023-03-29

    Inventor: Kosuke NISHIO

    Abstract: A board main body includes first and second resin layers contacting each other and including thermoplastic resin, a first signal conductor layer on an upper main surface of the second resin layer, an overlapping region in which the first and second resin layers are present when viewed in an up-down direction, and a non-overlapping region in which the first resin layer is not present and the second resin layer is present when viewed in the up-down direction. The first signal conductor layer includes a first curved portion in which the first signal conductor layer is curved in the up-down direction such that the first signal conductor layer in the first non-overlapping region is above the first signal conductor layer in the overlapping region. The first signal conductor layer is electrically connectable to an element on the board main body in the first non-overlapping region.

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