公开(公告)号：US09214600B2

公开(公告)日：2015-12-15

申请号：US14382286

申请日：2013-02-20

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Martin Mandl ,  Martin Straβburg ,  Christopher Kölper ,  Alexander Pfeuffer ,  Patrick Rode ,  Johannes Ledig ,  Richard Neumann ,  Andreas Waag

IPC: H01L33/00 ,  H01L33/08 ,  H01L33/18 ,  H01L33/42 ,  H01L33/62 ,  H01L33/38

CPC classification number: H01L33/08 ,  H01L33/16 ,  H01L33/18 ,  H01L33/24 ,  H01L33/385 ,  H01L33/42 ,  H01L33/50 ,  H01L33/62 ,  H01L2933/0016

Abstract: An optoelectronic semiconductor chip includes a number active regions that are arranged at a distance from each other and a substrate that is arranged on an underside of the active regions. One of the active regions has a main extension direction. The active region has a core region that is formed using a first semiconductor material. The active region has an active layer that covers the core region at least in directions perpendicular to the main extension direction of the active region. The active region has a cover layer that is formed using a second semiconductor material and covers the active layer at least in directions perpendicular to the main extension direction of the active region.

Abstract translation: 光电子半导体芯片包括彼此间隔一定距离设置的多个有源区和布置在有源区的下侧的衬底。 其中一个活跃区域有一个主要的延伸方向。 有源区具有使用第一半导体材料形成的芯区。 有源区域具有至少在垂直于有源区域的主延伸方向的方向上覆盖芯区域的有源层。 有源区具有使用第二半导体材料形成的覆盖层，并且至少在垂直于有源区的主延伸方向的方向上覆盖有源层。

公开(公告)号：US20150340561A1

公开(公告)日：2015-11-26

申请号：US14818630

申请日：2015-08-05

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Werner Bergbauer ,  Patrick Rode ,  Martin Strassburg

IPC: H01L33/32 ,  H01L33/50 ,  H01L33/00

CPC classification number: H01L33/12 ,  B82Y40/00 ,  H01L33/0025 ,  H01L33/0079 ,  H01L33/20 ,  H01L33/22 ,  H01L33/32 ,  H01L33/382 ,  H01L33/50 ,  H01L33/502 ,  H01L33/508 ,  H01L33/62 ,  H01L2224/48463

Abstract: An optoelectronic semiconductor chip includes a semiconductor layer stack including a nitride compound semiconductor material on a carrier substrate, wherein the semiconductor layer stack includes an active layer that emits an electromagnetic radiation, the semiconductor layer stack being arranged between a layer of a first conductivity and a layer of a second conductivity, the layer of the first conductivity is adjacent a front of the semiconductor layer stack, the layer of the first conductivity electrically connects to a first electrical connection layer covering at least a portion of a back of the semiconductor layer stack, and the layer of the second conductivity type electrically connects to a second electrical connection layer arranged at the back.

Abstract translation: 光电子半导体芯片包括在载体基板上包括氮化物化合物半导体材料的半导体层堆叠，其中所述半导体层堆叠包括发射电磁辐射的有源层，所述半导体层堆叠被布置在第一导电层和 所述第一导电层与所述半导体层堆叠的前部相邻，所述第一导电层电连接到覆盖所述半导体层堆叠的背面的至少一部分的第一电连接层， 并且第二导电类型的层电连接到布置在后面的第二电连接层。

公开(公告)号：US20140319547A1

公开(公告)日：2014-10-30

申请号：US14364099

申请日：2012-11-12

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Patrick Rode ,  Lutz Hoeppel ,  Norwin von Malm ,  Stefan Illek ,  Albrecht Kieslich ,  Siegfried Herrmann

IPC: H01L31/18 ,  H01L33/00

CPC classification number: H01L31/1876 ,  H01L33/005 ,  H01L33/36 ,  H01L33/382 ,  H01L2933/0016

Abstract: A method of producing a plurality of optoelectronic semiconductor chips includes a) providing a layer composite assembly having a principal plane which delimits the layer composite assembly in a vertical direction, and includes a semiconductor layer sequence having an active region that generates and/or detects radiation, wherein a plurality of recesses extending from the principal plane in a direction of the active region are formed in the layer composite assembly; b) forming a planarization layer on the principal plane such that the recesses are at least partly filled with material of the planarization layer; c) at least regionally removing material of the planarization layer to level the planarization layer; and d) completing the semiconductor chips, wherein for each semiconductor chip at least one semiconductor body emerges from the semiconductor layer sequence.

Abstract translation: 一种制造多个光电子半导体芯片的方法包括：a）提供具有在垂直方向上限定层复合组件的主平面的层复合组件，并且包括具有产生和/或检测辐射的有源区的半导体层序列 其特征在于，在所述层复合组件中形成有从所述主面向所述有源区的方向延伸的多个凹部， b）在所述主平面上形成平坦化层，使得所述凹部至少部分地被所述平坦化层的材料填充; c）至少在区域上去除平坦化层的材料以平整平坦化层; 以及d）完成半导体芯片，其中对于每个半导体芯片，至少一个半导体体从半导体层序列中排出。

公开(公告)号：US10242974B2

公开(公告)日：2019-03-26

申请号：US15113749

申请日：2015-01-21

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Lutz Hoeppel ,  Juergen Moosburger ,  Andreas Ploessl ,  Patrick Rode ,  Peter Nagel ,  Dominik Scholz

IPC: H01L33/00 ,  H01L31/12 ,  H01L29/267 ,  H01L27/15 ,  H01L25/16 ,  H01L33/48 ,  H01L25/00 ,  H01L31/0232 ,  H01L31/147 ,  H01L31/18 ,  H01L33/58

Abstract: A method for producing a plurality of optoelectronic semiconductor components (100) is provided, comprising the following steps: a) providing an auxiliary carrier (2); b) providing a plurality of semiconductor chips (10), wherein each of the semiconductor chips has a carrier body (12) and a semiconductor body (4) arranged on an upper side (22) of the carrier body; c) attaching the plurality of semiconductor chips on the auxiliary carrier, wherein the semiconductor chips are spaced apart from one another in a lateral direction (L) and wherein the semiconductor bodies are facing the auxiliary carrier, as seen from the carrier body; d) forming a scattering layer (18), at least in regions between the semiconductor bodies of adjacent semiconductor chips; e) forming a composite package (20); f) removing the auxiliary carrier (2); and g) individually separating the composite package into a plurality of optoelectronic semiconductor components (100).

公开(公告)号：US09735319B2

公开(公告)日：2017-08-15

申请号：US14987905

申请日：2016-01-05

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Martin Mandl ,  Martin Strassburg ,  Christopher Kölper ,  Alexander F. Pfeuffer ,  Patrick Rode

IPC: H01L33/44 ,  H01L33/18 ,  H01L33/24 ,  H01L27/15 ,  H01L33/60 ,  H01L33/14 ,  H01L33/20 ,  H01L33/32 ,  H01L33/08 ,  H01L33/22 ,  H01L33/42 ,  H01L33/46

CPC classification number: H01L33/44 ,  H01L27/156 ,  H01L33/08 ,  H01L33/14 ,  H01L33/18 ,  H01L33/20 ,  H01L33/22 ,  H01L33/24 ,  H01L33/32 ,  H01L33/42 ,  H01L33/46 ,  H01L33/60

Abstract: An optoelectronic semiconductor chip includes a multiplicity of active regions arranged at a distance from one another, and a continuous current spreading layer, wherein at least one of the active regions has a main extension direction, one of the active regions has a core region formed with a first semiconductor material, the active region has an active layer covering the core region at least in directions transversely with respect to the main extension direction of the active region, the active region has a cover layer formed with a second semiconductor material and covers the active layer at least in directions transversely with respect to the main extension direction of the active region, and the current spreading layer covers all cover layers of the active region.

公开(公告)号：US20150364641A1

公开(公告)日：2015-12-17

申请号：US14763464

申请日：2014-01-28

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： Werner Bergbauer ,  Philipp Drechsel ,  Peter Stauß ,  Patrick Rode

IPC: H01L33/00 ,  H01L33/22 ,  H01L31/0352 ,  H01L33/32 ,  H01L31/18 ,  H01L31/0304 ,  H01L33/24 ,  H01L33/02

CPC classification number: H01L33/0075 ,  H01L31/03044 ,  H01L31/035272 ,  H01L31/1856 ,  H01L31/1892 ,  H01L33/0025 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/025 ,  H01L33/12 ,  H01L33/22 ,  H01L33/24 ,  H01L33/32

Abstract: A semiconductor layer sequence includes a first nitridic compound semiconductor layer, a second nitridic compound semiconductor layer, and an intermediate layer arranged between the first and second nitridic compound semiconductor layers. Beginning with the first nitridic compound semiconductor layer, the intermediate layer and the second nitridic compound semiconductor layer are arranged one after the other in a direction of growth of the semiconductor layer sequence and are adjacent to each other in direct succession. The intermediate layer has a lattice constant different from the lattice constant of the first nitridic compound semiconductor layer at least at some points. The second nitridic compound semiconductor layer is lattice-adapted to the intermediate layer at least at some points.

Abstract translation: 半导体层序列包括第一氮化合物半导体层，第二氮化合物半导体层和布置在第一和第二氮化合物半导体层之间的中间层。 从第一氮化合物半导体层开始，中间层和第二氮化合物半导体层沿着半导体层序列的生长方向一个接一个地排列并且彼此直接相邻。 至少在某些点处，中间层具有与第一氮化合物半导体层的晶格常数不同的晶格常数。 至少在某些点，第二氮化合物半导体层对中间层进行晶格适应。

公开(公告)号：US20150236070A1

公开(公告)日：2015-08-20

申请号：US14702807

申请日：2015-05-04

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Jürgen Moosburger ,  Norwin von Malm ,  Patrick Rode ,  Lutz Höppel ,  Karl Engl

IPC: H01L27/15 ,  H01L33/00 ,  H01L33/38

CPC classification number: H01L27/15 ,  H01L25/167 ,  H01L33/005 ,  H01L33/02 ,  H01L33/08 ,  H01L33/382 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2924/00

Abstract: A radiation-emitting semiconductor chip includes a carrier and a semiconductor body having a semiconductor layer sequence, wherein an emission region and a protective diode region are formed in the semiconductor body having the semiconductor layer sequence; the semiconductor layer sequence includes an active region that generates radiation and is arranged between a first semiconductor layer and a second semiconductor layer; the first semiconductor layer is arranged on a side of the active region facing away from the carrier; the emission region has a recess extending through the active region; the first semiconductor layer, in the emission region, electrically conductively connects to a first connection layer, wherein the first connection layer extends in the recess from the first semiconductor layer toward the carrier; the second semiconductor layer, in the emission region, electrically conductively connects to a second connection layer.

Abstract translation: 辐射发射半导体芯片包括具有半导体层序列的载体和半导体本体，其中在具有半导体层序列的半导体主体中形成发光区域和保护二极管区域; 半导体层序列包括产生辐射并且被布置在第一半导体层和第二半导体层之间的有源区; 第一半导体层布置在有源区域背离载体的一侧; 发射区域具有延伸穿过有源区域的凹部; 发射区域中的第一半导体层导电地连接到第一连接层，其中第一连接层在凹部中从第一半导体层向载体延伸; 在发射区域中的第二半导体层导电地连接到第二连接层。

公开(公告)号：US20150021636A1

公开(公告)日：2015-01-22

申请号：US14382286

申请日：2013-02-20

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Martin Mandl ,  Martin Straßburg ,  Christopher Kölper ,  Alexander Pfeuffer ,  Patrick Rode ,  Johannes Ledig ,  Richard Neumann ,  Andreas Waag

IPC: H01L33/08 ,  H01L33/62 ,  H01L33/42 ,  H01L33/18

CPC classification number: H01L33/08 ,  H01L33/16 ,  H01L33/18 ,  H01L33/24 ,  H01L33/385 ,  H01L33/42 ,  H01L33/50 ,  H01L33/62 ,  H01L2933/0016

Abstract: An optoelectronic semiconductor chip includes a number active regions that are arranged at a distance from each other and a substrate that is arranged on an underside of the active regions. One of the active regions has a main extension direction. The active region has a core region that is formed using a first semiconductor material. The active region has an active layer that covers the core region at least in directions perpendicular to the main extension direction of the active region. The active region has a cover layer that is formed using a second semiconductor material and covers the active layer at least in directions perpendicular to the main extension direction of the active region.

Abstract translation: 光电子半导体芯片包括彼此间隔一定距离设置的多个有源区和布置在有源区的下侧的衬底。 其中一个活跃区域有一个主要的延伸方向。 有源区具有使用第一半导体材料形成的芯区。 有源区域具有至少在垂直于有源区域的主延伸方向的方向上覆盖芯区域的有源层。 有源区具有使用第二半导体材料形成的覆盖层，并且至少在垂直于有源区的主延伸方向的方向上覆盖有源层。

公开(公告)号：US08653540B2

公开(公告)日：2014-02-18

申请号：US13862096

申请日：2013-04-12

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Karl Engl ,  Patrick Rode ,  Lutz Hoeppel ,  Matthias Sabathil

IPC: H01L27/15 ,  H01L31/12 ,  H01L33/00

CPC classification number: H01L33/58 ,  H01L33/0079 ,  H01L33/22 ,  H01L33/382 ,  H01L33/405 ,  H01L33/44 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An optoelectronic semiconductor body includes a semiconductor layer sequence which has an active layer suitable for generating electromagnetic radiation, and a first and a second electrical connecting layer. The semiconductor body is provided for emitting electromagnetic radiation from a front side. The first and the second electrical connecting layer are arranged at a rear side opposite the front side and are electrically insulated from one another by means of a separating layer. The first electrical connecting layer, the second electrical connecting layer and the separating layer laterally overlap and a partial region of the second electrical connecting layer extends from the rear side through a breakthrough in the active layer in the direction of the front side. Furthermore, a method for producing such an optoelectronic semiconductor body is specified.

Abstract translation: 光电半导体本体包括具有适于产生电磁辐射的有源层的半导体层序列和第一和第二电连接层。 半导体本体被设置用于从前侧发射电磁辐射。 第一和第二电连接层布置在与前侧相对的后侧，并且通过分离层彼此电绝缘。 第一电连接层，第二电连接层和分离层横向重叠，并且第二电连接层的部分区域从后侧沿着正面的方向通过有源层中的穿透而延伸。 此外，规定了这种光电子半导体体的制造方法。

公开(公告)号：US10903119B2

公开(公告)日：2021-01-26

申请号：US16078995

申请日：2017-06-21

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Isabel Otto ,  Patrick Rode

IPC: H01L29/06 ,  H01L21/78 ,  H01L21/28 ,  H01L23/538

Abstract: A semiconductor chip, a method for producing a semiconductor chip and an apparatus having a plurality of semiconductor chips are disclosed. In an embodiment a chip includes a substrate and a semiconductor layer arranged at the substrate, wherein the substrate includes, at a side facing the semiconductor layer, a top side with a width B1 in a first lateral direction and, at a side opposite to the top side, a bottom side with a width B3 in the first lateral direction, wherein the substrate has a width B2 in the first lateral direction at a half height between the top side and the bottom side, and wherein the following applies to widths B1, B2 and B3: B1−B2 B3.