公开(公告)号：US20180322010A1

公开(公告)日：2018-11-08

申请号：US16035055

申请日：2018-07-13

Applicant: Renesas Electronics Corporation

Inventor： Yoshitaka IZAWA ,  Katsumi TOGAWA ,  Takao TOI ,  Taro FUJII

IPC: G06F11/14 ,  G06F11/00 ,  G06F11/20

CPC classification number: G06F11/142 ,  G06F11/00 ,  G06F11/20 ,  G06F11/202 ,  G06F2201/805 ,  G06F2201/85

Abstract: A semiconductor device and method includes a configuration information storage memory that stores a plurality of configuration information items, a state transition management unit that selects any one of the plurality of configuration information items, and a data path unit that dynamically reconfigures a circuit according to the configuration information item selected by the state transition management unit. When a detection of a failure or no failure is made in any one of a plurality of logic circuit groups provided in the data path unit, the state transition management unit selects the configuration information item depending on a result of the detection.