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公开(公告)号:US11842945B2
公开(公告)日:2023-12-12
申请号:US17508483
申请日:2021-10-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaemin Jung , Sanguk Han , Yoonha Jung
IPC: H01L25/18 , H01L23/373 , H01L23/498 , H05K1/18 , H05K1/02 , H01L23/00 , H05K1/14
CPC classification number: H01L23/3735 , H01L23/3733 , H01L23/3737 , H01L23/4985 , H01L25/18 , H05K1/0204 , H05K1/189 , H01L24/16 , H01L24/73 , H01L2224/16227 , H01L2224/73204 , H05K1/147 , H05K2201/10128
Abstract: A chip-on-film package includes a base film including an upper surface and a lower surface that opposite from each other, a semiconductor chip mounted on the upper surface of the base film, a heat emission layer disposed on the lower surface of the base film to at least partially overlap the semiconductor chip in a thickness direction, an insulating layer disposed on a lower surface of the heat emission layer, and a protective layer surrounding side and lower surfaces of the insulating layer. Accordingly, thermal fatigue of the chip-on-film package may be reduced, and reliability may be increased.
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公开(公告)号:US11836133B2
公开(公告)日:2023-12-05
申请号:US17515379
申请日:2021-10-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Andrew Zhenwen Chang , Vincent Tung Pham , Jaemin Jung
IPC: G06F12/0882 , G06F16/248 , G06F16/2453 , G06F16/2455
CPC classification number: G06F16/24539 , G06F12/0882 , G06F16/248 , G06F16/24532 , G06F16/24552
Abstract: An accelerator is disclosed. The accelerator may include an on-chip memory to store a data from a database. The on-chip memory may include a first memory bank and a second memory bank. The first memory bank may store the data, which may include a first value and a second value. A computational engine may execute, in parallel, a command on the first value in the data and the command on the second value in the data in the on-chip memory. The on-chip memory may be configured to load a second data from the database into the second memory bank in parallel with the computation engine executing the command on the first value in the data and executing the command on the second value in the data.
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公开(公告)号:USD837258S1
公开(公告)日:2019-01-01
申请号:US29633639
申请日:2018-01-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Designer: Heonwoo Lee , Hanna Kim , Jaemin Jung
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公开(公告)号:USD810114S1
公开(公告)日:2018-02-13
申请号:US29584465
申请日:2016-11-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Designer: Heonwoo Lee , Hanna Kim , Jaemin Jung
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公开(公告)号:US20250022998A1
公开(公告)日:2025-01-16
申请号:US18583947
申请日:2024-02-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seunghyun Cho , Jaemin Jung , Jeongkyu Ha
IPC: H01L33/62 , H01L25/075 , H01L25/16 , H01L33/48
Abstract: A film package includes a film substrate, vias penetrating through the film substrate, interconnection patterns on the film substrate, and a semiconductor chip electrically connected to at least one of the interconnection patterns and to the vias, wherein the interconnection patterns include input patterns, first output patterns, and second output patterns, the film package includes input pads on a surface of the film substrate, and the input patterns extend from the input pads, the film package includes first output pads positioned toward a first edge of the film substrate on a first surface of the film substrate, and the first output patterns extend from the first output pads, and the film package includes second output pads positioned toward a second edge of the film substrate on a second surface of the film substrate opposite to the first surface, and the second output patterns extend from the second output pads.
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公开(公告)号:US20240204009A1
公开(公告)日:2024-06-20
申请号:US18237013
申请日:2023-08-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seunghyun Cho , Jaemin Jung , Jeongkyu Ha
IPC: H01L27/12
CPC classification number: H01L27/1244
Abstract: A film package includes: a film substrate having a first side surface and a second side surface opposing each other in a first direction, each of the first side surface and the second side surface extending in a second direction perpendicular to the first direction; at least one semiconductor chip disposed on the film substrate and extending lengthwise in the first direction; input terminals arranged on the film substrate along the first side surface, output terminals arranged on the film substrate along the second side surface, and wirings formed on the film substrate and electrically connecting the input terminals and the output terminals to the at least one semiconductor chip; and a protective layer covering the wirings on the film substrate.
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公开(公告)号:US20240147722A1
公开(公告)日:2024-05-02
申请号:US18331397
申请日:2023-06-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byongju Kim , Dongsung Choi , Wonjun Park , Donghwa Lee , Jaemin Jung , Changheon Cheon
IPC: H10B43/27 , H01L23/528 , H01L25/065 , H10B41/10 , H10B41/27 , H10B41/35 , H10B43/10 , H10B43/35 , H10B80/00
CPC classification number: H10B43/27 , H01L23/5283 , H01L25/0652 , H10B41/10 , H10B41/27 , H10B41/35 , H10B43/10 , H10B43/35 , H10B80/00 , H01L2225/06551
Abstract: A semiconductor device may include a gate stack that includes a first insulating pattern, a second insulating pattern adjacent to the first insulating pattern, a third insulating pattern adjacent to the second insulating pattern, a first conductive pattern between the first and second insulating patterns, and a second conductive pattern between the second and third insulating patterns, a channel layer that extends in the gate stack, a tunnel insulating layer on the channel layer, and a first data storage pattern and a second data storage pattern on the tunnel insulating layer. The first data storage pattern may include a first outer portion between the first and second insulating patterns, and a first inner portion on the first outer portion.
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公开(公告)号:US20240096909A1
公开(公告)日:2024-03-21
申请号:US18200609
申请日:2023-05-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seunghyun Cho , Jaemin Jung , Jeongkyu Ha
CPC classification number: H01L27/1244 , H05K7/20954
Abstract: A chip on film (COF) package includes a film substrate including a base film having a mounting region, a main line pattern extending on the base film, and a branch line pattern extending on the base film and electrically connected to the main line pattern, a semiconductor chip vertically overlapping the mounting region, a first bump structure disposed between the semiconductor chip and the film substrate and electrically connected to the main line pattern, and a second bump structure disposed between the semiconductor chip and the film substrate and electrically connected to the branch line pattern, the branch line pattern extends so as not to overlap a first edge of the first bump structure facing a first edge of the mounting region and a first edge of the second bump structure facing the first edge of the mounting region.
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公开(公告)号:US20230036519A1
公开(公告)日:2023-02-02
申请号:US17679587
申请日:2022-02-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sanguk HAN , Jaemin Jung , Jeongkyu Ha , Kwanjai Lee
IPC: G09G3/20
Abstract: A chip on film package is provided. The chip on film package includes a film substrate with a base film, a conductive pad extending in a first direction on the base film, and a conductive line pattern extending from the conductive pad; a semiconductor chip provided on the film substrate; and a bump structure provided between the semiconductor chip and the conductive pad. A first peripheral wall and a second peripheral wall of the bump structure extend in the first direction and define a trench, a portion of the conductive pad is provided in the trench, and the conductive pad is spaced apart from at least one of the first peripheral wall and the second peripheral wall.
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公开(公告)号:US20220246530A1
公开(公告)日:2022-08-04
申请号:US17579635
申请日:2022-01-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jaemin Jung , Jeongkyu Ha , Sanguk Han
IPC: H01L23/538 , H01L25/18 , H05K1/18
Abstract: A chip on film (COF) package includes a base film having an upper surface and a lower surface opposite to each other, a bridge film having an edge that overlaps the base film, and an upper surface and a lower surface opposite to each other, a display driver integrated circuit (IC) mounted on the upper surface of the base film, and a heat dissipation member arranged in correspondence with the display driver IC on the lower surface of the base film. The upper surface of the base film and the lower surface of the bridge film adhere to each other in their respective long axis directions, and a long axis length of the bridge film is greater than a long axis length of the base film.
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