公开(公告)号：US20240288738A1

公开(公告)日：2024-08-29

申请号：US18407420

申请日：2024-01-08

Applicant: Sharp Display Technology Corporation

Inventor： Kengo HARA ,  Tohru DAITOH ,  Yoshihito HARA ,  Jun NISHIMURA ,  Yohei TAKEUCHI

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L27/12

CPC classification number: G02F1/13629 ,  G02F1/1368 ,  H01L27/124

Abstract: An active matrix substrate includes a pixel TFT provided corresponding to each pixel region, a pixel electrode electrically connected to the pixel TFT, a plurality of gate wirings extending in a row direction, and a plurality of source wirings extending in a column direction. Each gate wiring has a multilayer structure including a lower gate wiring electrically connected to a lower gate electrode included in the pixel TFT and an upper gate wiring electrically connected to an upper gate electrode included in the pixel TFT. In a case where the number of the gate wirings is defined as m and the number of the source wirings is defined as n, each gate wiring has 3 or more and less than n contact portions, each contact portion is positioned in any of n intersection regions, and the number of the contact portions overlapping each source wiring is less than m.