Methods and apparatus for a low power relaxation oscillator

    公开(公告)号:US10135428B2

    公开(公告)日:2018-11-20

    申请号:US15252725

    申请日:2016-08-31

    Abstract: In a described example, an apparatus includes: a capacitor coupled to receive a current at a first terminal and having a second terminal coupled to ground; a first comparator coupled to a voltage at the first terminal of the capacitor and to a first reference voltage; a second comparator coupled to the voltage at the first terminal of the capacitor and to a second reference voltage that is different from the first reference voltage, and having an enable input coupled to the output of the first comparator; a discharge circuit coupled to the capacitor and enabled by the output of the second comparator; and a toggle circuit coupled to the output of the second comparator. Methods are disclosed.

    Methods and Apparatus for a Low Power Relaxation Oscillator

    公开(公告)号:US20180062626A1

    公开(公告)日:2018-03-01

    申请号:US15252725

    申请日:2016-08-31

    CPC classification number: H03K4/501 H03B5/24

    Abstract: In a described example, an apparatus includes: a capacitor coupled to receive a current at a first terminal and having a second terminal coupled to ground; a first comparator coupled to a voltage at the first terminal of the capacitor and to a first reference voltage; a second comparator coupled to the voltage at the first terminal of the capacitor and to a second reference voltage that is different from the first reference voltage, and having an enable input coupled to the output of the first comparator; a discharge circuit coupled to the capacitor and enabled by the output of the second comparator; and a toggle circuit coupled to the output of the second comparator. Methods are disclosed.

    Switch turn-off circuit
    13.
    发明授权

    公开(公告)号:US11418181B2

    公开(公告)日:2022-08-16

    申请号:US16279642

    申请日:2019-02-19

    Abstract: Aspects of the present disclosure provide for a circuit comprising a switch coupled between a first node and a second node, a first transistor having a gate terminal, a drain terminal coupled to the second node, and a source terminal coupled to a ground terminal, a logic gate having a first input, a second input coupled to a third node, and an output coupled to the gate terminal of the first transistor, and a comparator having a first input coupled to the second node, a second input coupled to a fourth node, and an output coupled to the first input of the logic gate.

    DYNAMIC VOLTAGE REFERENCE FOR DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER (ADC) WITH TEMPERATURE TRIM CALIBRATION

    公开(公告)号:US20210211137A1

    公开(公告)日:2021-07-08

    申请号:US17205555

    申请日:2021-03-18

    Abstract: A calibratable switched-capacitor voltage reference and an associated calibration method are described. The voltage reference includes dynamic diode elements providing diode voltages, input capacitor(s) for sampling input voltages, base-emitter capacitor(s) for sampling one diode voltage with respect to a ground, dynamically trimmable capacitor(s) for sampling the one diode voltage with respect to another diode voltage, and an operational amplifier coupled to the capacitors for providing reference voltage(s) based on the sampled input and diode voltages and on trims of the trimmable capacitor(s). The voltage reference can be configured as a first integrator of a modulator stage of a delta-sigma analog-to-digital converter.

    Programmable time-division multiplexed comparator

    公开(公告)号:US10826477B2

    公开(公告)日:2020-11-03

    申请号:US16664346

    申请日:2019-10-25

    Abstract: A monitoring circuit is implemented for comparing a sampled voltage taken from a selected sampling capacitor and a reference voltage from a voltage buffer (150). The voltage buffer (150) is configurable according to programming provided to a programmable logic controller, PLC, (570). Comparisons may be made on a periodic basis, such as a time-division multiplexed basis, in connection with register settings in the PLC (570).

    BATTERY SENSING VOLTAGE CONTROLLER
    16.
    发明申请

    公开(公告)号:US20180254652A1

    公开(公告)日:2018-09-06

    申请号:US15840882

    申请日:2017-12-13

    Abstract: A battery pack includes a housing, a battery, a battery pack output voltage path that includes a charge power switch and a discharge power switch, and a battery sense output. A switch can be operably coupled between the battery and the battery sense output and configured to selectively open and close a battery sense path between the battery and the battery sense output. By one approach a first control circuit controls the open and close state of the aforementioned switch (in response, for example, to a comparison of the voltage differential across the switch to a predetermined threshold such that the switch is opened when the voltage differential across the switch becomes too positive or too negative with respect to battery voltage).

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