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    METHOD OF FORMING OPENING ON SEMICONDUCTOR SUBSTRATE
    11.
    发明申请
    METHOD OF FORMING OPENING ON SEMICONDUCTOR SUBSTRATE 有权
    在半导体基板上形成开路的方法

    公开(公告)号：US20140106568A1

    公开(公告)日：2014-04-17

    申请号：US14142940

    申请日：2013-12-30

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chun-Yuan Wu ,  Chih-Chien Liu ,  Chin-Fu Lin ,  Po-Chun Chen

    IPC: H01L21/311

    CPC classification number: H01L21/31144 ,  H01L21/76802

    Abstract: The present invention provides a method of forming an opening on a semiconductor substrate. First, a substrate is provided. Then a dielectric layer and a cap layer are formed on the substrate. A ratio of a thickness of the dielectric layer and a thickness of the cap layer is substantially between 15 and 1.5. Next, a patterned boron nitride layer is formed on the cap layer. Lastly, an etching process is performed by using the patterned hard mask as a mask to etch the cap layer and the dielectric layer so as to form an opening in the cap layer and the dielectric layer.

    Abstract translation: 本发明提供一种在半导体衬底上形成开口的方法。 首先，提供基板。 然后在基板上形成介电层和盖层。 电介质层的厚度和盖层的厚度之比基本上在15和1.5之间。 接下来，在盖层上形成图案化的氮化硼层。 最后，通过使用图案化的硬掩模作为掩模来执行蚀刻工艺，以蚀刻覆盖层和电介质层，以在盖层和电介质层中形成开口。

    NON-PLANAR SEMICONDUCTOR STRUCTURE
    12.
    发明申请
    NON-PLANAR SEMICONDUCTOR STRUCTURE 有权
    非平面半导体结构

    公开(公告)号：US20130228836A1

    公开(公告)日：2013-09-05

    申请号：US13869037

    申请日：2013-04-24

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Shih-Hung Tsai ,  Chien-Ting Lin ,  Chin-Cheng Chien ,  Chin-Fu Lin ,  Chih-Chien Liu ,  Teng-Chun Tsai ,  Chun-Yuan Wu

    IPC: H01L29/78

    CPC classification number: H01L29/785 ,  H01L29/66795

    Abstract: A non-planar semiconductor structure includes a substrate, at least two fin-shaped structures, at least an isolation structure, and a plurality of epitaxial layers. The fin-shaped structures are located on the substrate. The isolation structure is located between the fin-shaped structures, and the isolation structure has a nitrogen-containing layer. The epitaxial layers respectively cover a part of the fin-shaped structures and are located on the nitrogen-containing layer. Anon-planar semiconductor process is also provided for forming the semiconductor structure.

    Abstract translation: 非平面半导体结构包括衬底，至少两个鳍状结构，至少一个隔离结构和多个外延层。 鳍状结构位于基底上。 隔离结构位于鳍状结构之间，隔离结构具有含氮层。 外延层分别覆盖了鳍状结构的一部分并且位于含氮层上。 还提供了用于形成半导体结构的非平面半导体工艺。

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