公开(公告)号：US20230049425A1

公开(公告)日：2023-02-16

申请号：US17973558

申请日：2022-10-26

Applicant: Winbond Electronics Corp.

Inventor： Keng-Ping Lin ,  Shu-Ming Li ,  Tzu-Ming Ou Yang

IPC: H01L27/108

Abstract: A manufacturing method of a memory structure including the following steps is provided. A substrate is provided. The substrate includes a memory array region. A bit line structure is formed in the memory array region. The bit line structure is located on the substrate. A contact structure is formed in the memory array region. The contact structure is located on the substrate on one side of the bit line structure. A stop layer is formed in the memory array region. The stop layer is located above the bit line structure. A capacitor structure is formed in the memory array region. The capacitor structure passes through the stop layer and is electrically connected to the contact structure. The bottom surface of the capacitor structure is lower than the bottom surface of the stop layer.

公开(公告)号：US11527537B2

公开(公告)日：2022-12-13

申请号：US17306874

申请日：2021-05-03

Applicant: Winbond Electronics Corp.

Inventor： Keng-Ping Lin ,  Shu-Ming Li ,  Tzu-Ming Ou Yang

IPC: H01L27/108

Abstract: A memory structure including a substrate, a bit line structure, a contact structure, a stop layer, and a capacitor structure is provided. The substrate includes a memory array region. The bit line structure is located in the memory array region and located on the substrate. The contact structure is located in the memory array region and located on the substrate on one side of the bit line structure. The stop layer is located in the memory array region and located above the bit line structure. The capacitor structure is located in the memory array region. The capacitor structure passes through the stop layer and is electrically connected to the contact structure. A bottom surface of the capacitor structure is lower than a bottom surface of the stop layer.

公开(公告)号：US20200219889A1

公开(公告)日：2020-07-09

申请号：US16554643

申请日：2019-08-29

Applicant: Winbond Electronics Corp.

Inventor： Keng-Ping Lin ,  Tetsuharu Kurokawa ,  Tzu-Ming Ou Yang ,  Shu-Ming Li

IPC: H01L27/108 ,  H01L29/06 ,  H01L21/761

Abstract: Provided is a landing pad structure including a substrate, a plurality of landing pads, a guard ring, and an edge pattern. The substrate includes a cell region, a periphery region, and a guard ring region located between the cell region and the periphery region. The landing pads are arranged on the substrate in the cell region in a hexagonal close packing (HCP) configuration. The guard ring is disposed on the substrate in the guard ring region in a strip form. The edge pattern is disposed on the substrate in the cell region and close to the guard ring region. A method of manufacturing the landing pad structure is also provided.

公开(公告)号：US20190140069A1

公开(公告)日：2019-05-09

申请号：US16168847

申请日：2018-10-24

Applicant: Winbond Electronics Corp.

Inventor： Keng-Ping Lin ,  Tzu-Ming Ou Yang ,  Shu-Ming Li ,  Tetsuharu Kurokawa

IPC: H01L29/66 ,  H01L29/51 ,  H01L29/78 ,  H01L21/308 ,  H01L21/762

Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a plurality of gate structures, a plurality of dielectric structures, and spacers. The plurality of gate structures is disposed on the substrate. The plurality of dielectric structures is respectively disposed between the gate structures and the substrate, wherein a top width of the dielectric structure is less than the bottom width of the dielectric structure. The spacers are disposed on the sidewalls of the gate structures and cover the sidewalls of the dielectric structures.