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    Margin test methods and circuits
    11.
    发明授权
    Margin test methods and circuits 有权

    公开(公告)号：US11233589B2

    公开(公告)日：2022-01-25

    申请号：US17102779

    申请日：2020-11-24

    Applicant: Rambus Inc.

    Inventor： Andrew Ho ,  Vladimir Stojanovic ,  Bruno W. Garlepp ,  Fred F. Chen

    IPC: H04B17/29 ,  H04L25/03 ,  H04L27/01 ,  H04B17/21 ,  G01R31/317 ,  H04L1/20 ,  H04L1/24 ,  H04L7/033 ,  G06F11/08 ,  H04L7/04 ,  H04L7/10

    Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

    In-situ quantum error correction
    12.
    发明授权
    In-situ quantum error correction 有权

    公开(公告)号：US11106992B2

    公开(公告)日：2021-08-31

    申请号：US16905372

    申请日：2020-06-18

    Applicant: Google LLC

    Inventor： Julian Shaw Kelly

    IPC: G06N10/00 ,  H01L39/02 ,  G06N99/00 ,  H01L29/66 ,  G06F11/07 ,  G06F11/08

    Abstract: Methods, systems, and apparatus for parallel optimization of continuously running quantum error correction by closed-loop feedback. In one aspect, a method includes continuously and effectively optimizing qubit performance in-situ whilst an error correction operation on the quantum system is running. The method directly monitors the output from error detection and provides this information as feedback to calibrate the quantum gates associated with the quantum system. In some implementations, the physical qubits are spatially partitioned into one or more independent hardware patterns, where the errors attributable to each hardware pattern are non-overlapping. The one or more different sets of hardware patterns are then temporarily interleaved such that all physical qubits and operations are optimized. The method allows for the optimization of each section of a hardware pattern to be performed individually and in parallel, and can result is O(1) scaling.

    System event search based on heterogeneous logs
    17.
    发明授权
    System event search based on heterogeneous logs 有权

    公开(公告)号：US10909115B2

    公开(公告)日：2021-02-02

    申请号：US16203008

    申请日：2018-11-28

    Applicant: NEC Laboratories America, Inc.

    Inventor： Bo Zong ,  Jianwu Xu ,  Haifeng Chen

    IPC: G06F7/00 ,  G06F16/2453 ,  G06F16/2458 ,  G06F16/2455 ,  G06F16/9038 ,  G06F16/17 ,  G06F16/14 ,  G06F11/08 ,  G06K9/62

    Abstract: Systems and methods for system event searching based on heterogeneous logs are provided. A system can include a processor device operatively coupled to a memory device wherein the processor device is configured to mine a variety of log patterns from various of heterogeneous logs to obtain known-event log patterns and unknown-event log patterns, as well as to build a weighted vector representation of the log patterns. The processor device is also configured to evaluate a similarity between the vector representation of the unknown-event and known-event log patterns, identify a known event that is most similar to an unknown event to troubleshoot system faults based on past actions for similar events to improve an operation of a computer system.

    Multi-level recovery reads for memory
    18.
    发明授权
    Multi-level recovery reads for memory 有权

    公开(公告)号：US10908986B2

    公开(公告)日：2021-02-02

    申请号：US15943456

    申请日：2018-04-02

    Applicant: SanDisk Technologies LLC

    Inventor： Robert Ellis ,  Daniel Helmick

    IPC: G06F11/08 ,  G06F3/06 ,  G11C16/26

    Abstract: Read operations are performed in a memory device which efficiently provide baseline read data and recovery read data. In one aspect, on-die circuitry, which is on a die with an array of memory cells, obtains recovery read data before it is requested or needed by an off-die controller. In another aspect, data from multiple reads is obtained and made available in a set of output latches for retrieval by the off-die controller. Read data relative to multiple read thresholds is obtained and transferred from latches associated with the sense circuits to the set of output latches. The read data relative to multiple read thresholds can be stored and held concurrently in the set of output latches for retrieval by the off-die controller.

    REDUNDANT TRACKING SYSTEM
    20.
    发明申请
    REDUNDANT TRACKING SYSTEM 审中-公开

    公开(公告)号：US20200250888A1

    公开(公告)日：2020-08-06

    申请号：US16853356

    申请日：2020-04-20

    Applicant: Snap Inc

    Inventor： Andrew James McPhee ,  Samuel Edward Hare ,  Peicheng Yu ,  Robert Cornelius Murphy ,  Dhritiman Sagar

    IPC: G06T19/00 ,  G06T7/246 ,  G06F3/03 ,  G06F3/038 ,  G06F3/0346 ,  A63F13/211 ,  G06F3/01 ,  G06F11/08 ,  G06T15/20

    Abstract: A redundant tracking system comprising multiple redundant tracking sub-systems, enabling seamless transitions between such tracking sub-systems, provides a solution to this problem by merging multiple tracking approaches into a single tracking system. This system is able to combine tracking objects with six degrees of freedom (6DoF) and 3DoF through combining and transitioning between multiple tracking systems based on the availability of tracking indicia tracked by the tracking systems. Thus, as the indicia tracked by any one tracking system becomes unavailable, the redundant tracking system seamlessly switches between tracking in 6DoF and 3DoF thereby providing the user with an uninterrupted experience.

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