公开(公告)号：US11843691B2

公开(公告)日：2023-12-12

申请号：US17344253

申请日：2021-06-10

Applicant: Intel Corporation

Inventor： Thomas E. Willis ,  Brad Burres ,  Amit Kumar

IPC: G06F3/06 ,  H04L9/08 ,  G06F9/50 ,  H04L69/12 ,  H04L69/32 ,  G06F16/25 ,  G06F16/2453 ,  H04L49/9005 ,  G11C8/12 ,  G11C29/02 ,  H04L41/0896 ,  G06F30/34 ,  B25J15/00 ,  G06F1/18 ,  G06F1/20 ,  G06F11/34 ,  G06F15/78 ,  H04L41/5025 ,  H04L67/1008 ,  H05K7/14 ,  H05K7/18 ,  H05K7/20 ,  H04L67/1001 ,  G11C29/36 ,  G11C29/38 ,  G11C29/44 ,  G06F16/22 ,  G06F16/2455 ,  G06F12/02 ,  G06F12/14 ,  G06F13/16 ,  G06F15/173 ,  G06F13/40 ,  G06F13/42 ,  G06F9/448 ,  G06F9/28 ,  G06F15/16 ,  H04L41/0893 ,  H04L69/22 ,  H04L69/321 ,  H04L41/0213 ,  H04L41/0668 ,  H04L41/0677 ,  H04L45/28 ,  H04L45/7453 ,  H04L47/11 ,  H04L47/125 ,  H04L49/00 ,  H04L49/351 ,  G06F9/4401 ,  G06F9/445 ,  G06F12/06 ,  G06F16/23 ,  G06F16/248 ,  G06F16/901 ,  G06F16/11 ,  G06F9/44 ,  G06F9/48 ,  G06F21/10 ,  G06N3/063 ,  G06Q10/0631 ,  G06Q30/0283 ,  H04L41/14 ,  H04L41/5019 ,  H04L49/40 ,  H04L9/40 ,  G06F12/0802 ,  G06F12/1045

CPC classification number: H04L9/0819 ,  B25J15/0014 ,  G06F1/183 ,  G06F1/20 ,  G06F3/0604 ,  G06F3/065 ,  G06F3/0605 ,  G06F3/067 ,  G06F3/0611 ,  G06F3/0613 ,  G06F3/0629 ,  G06F3/0631 ,  G06F3/0632 ,  G06F3/0644 ,  G06F3/0647 ,  G06F3/0659 ,  G06F3/0673 ,  G06F3/0683 ,  G06F3/0685 ,  G06F9/28 ,  G06F9/445 ,  G06F9/4406 ,  G06F9/4411 ,  G06F9/4494 ,  G06F9/505 ,  G06F9/5044 ,  G06F9/5088 ,  G06F11/3442 ,  G06F12/023 ,  G06F12/06 ,  G06F12/0607 ,  G06F12/14 ,  G06F13/1663 ,  G06F13/1668 ,  G06F13/4068 ,  G06F13/42 ,  G06F15/161 ,  G06F15/17331 ,  G06F15/7807 ,  G06F15/7867 ,  G06F16/119 ,  G06F16/221 ,  G06F16/2237 ,  G06F16/2255 ,  G06F16/2282 ,  G06F16/2365 ,  G06F16/248 ,  G06F16/2453 ,  G06F16/2455 ,  G06F16/24553 ,  G06F16/25 ,  G06F16/9014 ,  G06F30/34 ,  G11C8/12 ,  G11C29/028 ,  G11C29/36 ,  G11C29/38 ,  G11C29/44 ,  H04L9/0894 ,  H04L41/0213 ,  H04L41/0668 ,  H04L41/0677 ,  H04L41/0893 ,  H04L41/0896 ,  H04L41/5025 ,  H04L45/28 ,  H04L45/7453 ,  H04L47/11 ,  H04L47/125 ,  H04L49/30 ,  H04L49/351 ,  H04L49/9005 ,  H04L67/1001 ,  H04L67/1008 ,  H04L69/12 ,  H04L69/22 ,  H04L69/32 ,  H04L69/321 ,  H05K7/1489 ,  H05K7/18 ,  H05K7/20209 ,  H05K7/20736 ,  G06F9/44 ,  G06F9/4401 ,  G06F9/4856 ,  G06F9/5061 ,  G06F12/0802 ,  G06F12/1054 ,  G06F12/1063 ,  G06F13/4022 ,  G06F15/1735 ,  G06F21/105 ,  G06F2200/201 ,  G06F2201/85 ,  G06F2209/509 ,  G06F2212/1044 ,  G06F2212/1052 ,  G06F2212/601 ,  G06F2213/0026 ,  G06F2213/0064 ,  G06F2213/3808 ,  G06N3/063 ,  G06Q10/0631 ,  G06Q30/0283 ,  H04L41/14 ,  H04L41/5019 ,  H04L49/40 ,  H04L63/0428 ,  H05K7/1498

Abstract: Technologies for processing network packets by a host interface of a network interface controller (NIC) of a compute device. The host interface is configured to retrieve, by a symmetric multi-purpose (SMP) array of the host interface, a message from a message queue of the host interface and process, by a processor core of a plurality of processor cores of the SMP array, the message to identify a long-latency operation to be performed on at least a portion of a network packet associated with the message. The host interface is further configured to generate another message which includes an indication of the identified long-latency operation and a next step to be performed upon completion. Additionally, the host interface is configured to transmit the other message to a corresponding hardware unit scheduler as a function of the subsequent long-latency operation to be performed. Other embodiments are described herein.

公开(公告)号：US11762746B2

公开(公告)日：2023-09-19

申请号：US17669144

申请日：2022-02-10

Applicant: Microsoft Technology Licensing, LLC

Inventor： Brandon Murdoch ,  Ankur Patel ,  Daniel James Buchner

IPC: G06F11/20

CPC classification number: G06F11/2094 ,  G06F2201/805 ,  G06F2201/85

Abstract: A computing system is configured to receive user data from a user associated with a decentralized identifier (DID) and authenticate the user based on the DID via data recorded on a distributed ledger. In response to authenticating the user, the computing system stores the user data redundantly at each of a plurality of decentralized identity stores. One of the plurality of decentralized identity stores is designated as a primary decentralized identity store. In particular, redundantly storing the user data includes storing the user data at the primary decentralized identity store, and causing each remaining decentralized identity store in the plurality of decentralized identity stores to store the user data following the primary decentralized identity store.

公开(公告)号：US11758031B2

公开(公告)日：2023-09-12

申请号：US17739684

申请日：2022-05-09

Applicant: Intel Corporation

Inventor： Rita H. Wouhaybi ,  John Vicente ,  Kirk Smith ,  Robert Chavez ,  Mark Yarvis ,  Steven M. Brown ,  Jeremy Ouillette ,  Roderick E. Kronschnabel ,  Matthew J. Schneider ,  Chris D. Lucero ,  Atul N. Hatalkar ,  Sharad K. Garg ,  Casey Rathbone ,  Aaron R. Berck ,  Xubo Zhang ,  Ron Kuruvilla Thomas ,  Mandeep Shetty ,  Ansuya Negi

IPC: G08B23/00 ,  G08B25/14 ,  G08B21/14 ,  G06F9/445 ,  G06F9/455 ,  H04L69/40 ,  H04L67/10 ,  G05B19/042 ,  G05B19/05 ,  G05B19/418 ,  H04L41/082 ,  H04L41/084 ,  H04L67/04 ,  H04L67/104 ,  H04L67/12 ,  H04L67/125 ,  H04L67/00 ,  G06F8/65 ,  G06F11/20 ,  H04L67/565 ,  H04L41/0668

CPC classification number: H04L69/40 ,  G05B19/042 ,  G05B19/054 ,  G05B19/41835 ,  G06F8/65 ,  G06F11/2023 ,  G06F11/2033 ,  H04L41/0668 ,  H04L41/082 ,  H04L41/0846 ,  H04L67/04 ,  H04L67/10 ,  H04L67/1048 ,  H04L67/1051 ,  H04L67/12 ,  H04L67/125 ,  H04L67/34 ,  H04L67/565 ,  G05B2219/1105 ,  G05B2219/1214 ,  G05B2219/32043 ,  G05B2219/33112 ,  G06F2201/805 ,  G06F2201/82 ,  G06F2201/85

Abstract: Various systems and methods for implementing a software defined industrial system are described herein. For example, an orchestrated system of distributed nodes may run an application, including modules implemented on the distributed nodes. In response to a node failing, a module may be redeployed to a replacement node. In an example, self-descriptive control applications and software modules are provided in the context of orchestratable distributed systems. The self-descriptive control applications may be executed by an orchestrator or like control device and use a module manifest to generate a control system application. For example, an edge control node of the industrial system may include a system on a chip including a microcontroller (MCU) to convert IO data. The system on a chip includes a central processing unit (CPU) in an initial inactive state, which may be changed to an activated state in response an activation signal.

公开(公告)号：US11720447B2

公开(公告)日：2023-08-08

申请号：US17144082

申请日：2021-01-07

Applicant: VMware, Inc.

Inventor： Pratap Subrahmanyam ,  Rajesh Venkatasubramanian ,  Kiran Tati ,  Qasim Ali ,  Marcos Aguilera ,  Irina Calciu ,  Venkata Subhash Reddy Peddamallu ,  Xavier Deguillard ,  Yi Yao

IPC: G06F11/14 ,  G06F11/20 ,  G06F16/27 ,  G06F1/26

CPC classification number: G06F11/1438 ,  G06F1/263 ,  G06F11/1464 ,  G06F11/1471 ,  G06F11/1484 ,  G06F11/2025 ,  G06F16/27 ,  G06F2201/805 ,  G06F2201/82 ,  G06F2201/84 ,  G06F2201/85

Abstract: Techniques for achieving application high availability via application-transparent battery-backed replication of persistent data are provided. In one set of embodiments, a computer system can detect a failure that causes an application of the computer system to stop running. In response to detecting the failure, the computer system can copy persistent data written by the application and maintained locally at the computer system to one or more remote destinations, where the copying is performed in a manner that is transparent to the application and while the computer system runs on battery power. The application can then be restarted on another computer system using the copied data.

公开(公告)号：US11709741B1

公开(公告)日：2023-07-25

申请号：US17216301

申请日：2021-03-29

Applicant: Amazon Technologies, Inc.

Inventor： Hardeep Singh Uppal ,  Harvo Reyzell Jones ,  Brad E Marshall ,  Joseph Elmar Magerramov

IPC: G06F11/00 ,  G06F11/20 ,  H04L12/46 ,  G06F11/07 ,  H04L45/28

CPC classification number: G06F11/2023 ,  G06F11/0709 ,  H04L12/4641 ,  G06F2201/85 ,  H04L45/28

Abstract: The present disclosure generally relates to a first network device in a primary region that can failover network traffic into a second network device in a failover region. The first network device can receive routing criteria identifying how traffic originating in the primary region should be routed. The first network device can transmit this routing criteria to the second network device in the failover region. Based on determining the occurrence of a failover event, the first network device may transmit network traffic originating in the primary region to the second network device in the failover region. The second network device can determine how to route the network traffic based on the routing criteria of the primary region. In some embodiments, the second network device can determine how to route the network traffic based on the routing criteria of the failover region.

公开(公告)号：US11650889B2

公开(公告)日：2023-05-16

申请号：US16545602

申请日：2019-08-20

Applicant: SYBASE, INC.

Inventor： Heping Shang ,  Ming-Chen Lo ,  Elena Lora-Gallardo ,  Xia-ge Dai

IPC: G06F16/00 ,  G06F11/14 ,  G06F11/16 ,  G06F11/20 ,  G06F16/18 ,  G06F16/23

CPC classification number: G06F11/1471 ,  G06F11/1474 ,  G06F11/165 ,  G06F11/2012 ,  G06F11/2082 ,  G06F16/1865 ,  G06F16/2308 ,  G06F11/2094 ,  G06F2201/80 ,  G06F2201/84 ,  G06F2201/85

Abstract: A method for reliable data synchronization within a network is disclosed. The producer system stories data in a persistent data store and produces one or more data updates. The producer system simultaneously transmits the data updates to a consumer system and initiating storage of the data updates at the producer system. When storage of the data updates at the producer system is complete, the producer system transmits a first acknowledgment to the consumer system. The producer system determines whether a second acknowledgment has been received from the consumer system, wherein the second acknowledgment indicates that the consumer system has successfully stored the data updates at the consumer system. In accordance with a determination that the second acknowledgment has been received from the consumer system, the producer system changes the temporary status of the data updates stored at the producer system to a permanent status.

公开(公告)号：US20190188102A1

公开(公告)日：2019-06-20

申请号：US16203110

申请日：2018-11-28

Applicant: CloudEndure Ltd.

Inventor： Leonid FEINBERG ,  Ofir EHRLICH ,  Sigal WEINER ,  Eran WEISS ,  Ophir SETTER ,  Kosta SHOUGAEV

IPC: G06F11/20 ,  G06F11/14

CPC classification number: H04L67/1095 ,  G06F9/4416 ,  G06F11/1482 ,  G06F11/2094 ,  G06F11/2097 ,  G06F2201/85 ,  H04L67/10

Abstract: A system and method for replicating block storage to an object storage, the method including: receiving write instructions from an original component (OC) in a first network, wherein the write instructions include a data block; mapping the write instructions to at least one object in the object storage; and storing the data block of the write instructions in the mapped at least one object in a second network.

公开(公告)号：US20190042122A1

公开(公告)日：2019-02-07

申请号：US15856173

申请日：2017-12-28

Applicant: Intel Corporation

Inventor： Mark Schmisseur ,  Dimitrios Ziakas ,  Murugasamy K. Nachimuthu

IPC: G06F3/06

CPC classification number: H04L9/0819 ,  G06F3/0604 ,  G06F3/0605 ,  G06F3/0611 ,  G06F3/0613 ,  G06F3/0629 ,  G06F3/0631 ,  G06F3/0632 ,  G06F3/0644 ,  G06F3/0647 ,  G06F3/065 ,  G06F3/0659 ,  G06F3/067 ,  G06F3/0673 ,  G06F3/0683 ,  G06F3/0685 ,  G06F9/28 ,  G06F9/4406 ,  G06F9/4411 ,  G06F9/445 ,  G06F9/4494 ,  G06F9/5044 ,  G06F9/5088 ,  G06F12/023 ,  G06F12/06 ,  G06F12/0607 ,  G06F12/0802 ,  G06F12/1054 ,  G06F12/1063 ,  G06F12/14 ,  G06F13/1663 ,  G06F13/1668 ,  G06F13/4068 ,  G06F13/42 ,  G06F15/161 ,  G06F15/17331 ,  G06F16/119 ,  G06F16/221 ,  G06F16/2237 ,  G06F16/2255 ,  G06F16/2282 ,  G06F16/2365 ,  G06F16/2453 ,  G06F16/2455 ,  G06F16/24553 ,  G06F16/248 ,  G06F16/25 ,  G06F16/9014 ,  G06F2201/85 ,  G06F2209/509 ,  G06F2212/1044 ,  G06F2212/1052 ,  G06F2212/601 ,  G06F2213/0064 ,  G11C8/12 ,  G11C29/028 ,  G11C29/36 ,  G11C29/38 ,  G11C29/44 ,  H04L9/0894 ,  H04L41/0213 ,  H04L41/0668 ,  H04L41/0677 ,  H04L41/0893 ,  H04L41/0896 ,  H04L45/28 ,  H04L45/7453 ,  H04L47/11 ,  H04L47/125 ,  H04L49/30 ,  H04L49/351 ,  H04L49/9005 ,  H04L69/12 ,  H04L69/22 ,  H04L69/32 ,  H04L69/321

Abstract: Technologies for efficiently managing the allocation of memory in a shared memory pool include a memory sled. The memory sled includes a memory pool of byte-addressable memory devices. The memory sled also includes a memory pool controller coupled to the memory pool. The memory pool controller receives a request to provision memory to a compute sled. Further, the memory pool controller maps, in response to the request, each of the memory devices of the memory pool to the compute sled. The memory pool controller additionally assigns access rights to the compute sled as a function of one or more memory characteristics of the compute sled. The memory characteristics are indicative of an amount of memory in the memory pool to be used by the compute sled and the access rights are indicative of access permissions to one or more memory address ranges associated with the one or more memory devices.

公开(公告)号：US20180246794A1

公开(公告)日：2018-08-30

申请号：US15901330

申请日：2018-02-21

Applicant: Everspin Technologies, Inc.

Inventor： Kurt BATY ,  Terry Van HULETT

IPC: G06F11/20

CPC classification number: G06F11/2094 ,  G06F11/0727 ,  G06F11/076 ,  G06F11/106 ,  G06F11/3037 ,  G06F2201/805 ,  G06F2201/82 ,  G06F2201/85 ,  G11C29/00 ,  G11C29/4401 ,  G11C29/76

Abstract: The present disclosure is drawn to, among other things, a method of managing a memory device. In some aspects, the method includes scanning a first memory region for bit errors; in response to detecting one or more bit errors in the first memory region, incrementing a counter associated with the first memory region based on the number of bit errors detected; comparing a total number of bit errors against a threshold, wherein the total number of bit errors is identified from the first counter; and, if the total number of bit errors exceeds the threshold, restricting access to the first memory region by mapping an address corresponding to the first memory region to a second memory region.

公开(公告)号：US10061661B2

公开(公告)日：2018-08-28

申请号：US15181660

申请日：2016-06-14

Applicant: International Business Machines Corporation

Inventor： Akira Saitoh

IPC: G06F11/07 ,  G06F11/14 ,  G06F9/54 ,  G06F9/46 ,  G06F9/48

CPC classification number: G06F11/1471 ,  G06F9/461 ,  G06F9/485 ,  G06F9/542 ,  G06F11/14 ,  G06F11/1417 ,  G06F2201/805 ,  G06F2201/84 ,  G06F2201/85

Abstract: A computer-implemented method includes running a software unit in an isolation container located on a software platform. The computer-implemented method further includes allocating an instance of a device function instantiated by the software platform to the software unit. The computer-implemented method further includes storing usage data associated with the instance to a memory region logically external to the isolation container, the usage data being generated by the software unit operating the device function. The computer-implemented method further includes detecting a failure of the software unit. The computer-implemented method further includes, responsive to detecting the failure, restarting the software unit and providing the software unit with a usage context, wherein the usage context comprises at least one of identifying information and the usage data associated with the instance stored in the memory region logically external to the isolation container. A corresponding computer system and computer program product are also disclosed.