Reliability coding with reduced network traffic

    公开(公告)号:US12050516B2

    公开(公告)日:2024-07-30

    申请号:US18173838

    申请日:2023-02-24

    Abstract: This disclosure describes techniques that include implementing network-efficient data durability or data reliability coding on a network. In one example, this disclosure describes a method that includes generating a plurality of data fragments from data to enable reconstruction of the data from a subset of the plurality of data fragments; storing, across a plurality of nodes in a network, the plurality of data fragments, wherein storing the plurality of data fragments includes storing the first fragment at a first node and the second fragment at a second node; and generating, by the first node, a plurality of secondary fragments derived from the first fragment to enable reconstruction of the first fragment from a subset of the plurality of secondary fragments; and storing the plurality of secondary fragments from the first fragment across a plurality of storage devices included within the first node.

    Methods for cache rewarming in a failover domain and devices thereof

    公开(公告)号:US12038817B2

    公开(公告)日:2024-07-16

    申请号:US17562401

    申请日:2021-12-27

    Applicant: NetApp, Inc.

    Inventor: Brian Naylor

    Abstract: Methods, non-transitory machine readable media, and computing devices that facilitate cache rewarming in a failover domain are disclosed. With this technology, a tag is inserted into a local tagstore. The tag includes a location of data in a cache hosted by a failover computing device and is retrieved from a snapshot of a remote tagstore for the cache. An invalidation log for an aggregate received from the failover computing device is replayed subsequent to mounting a filesystem that is associated with the aggregate and comprises the data. The data is retrieved from the cache following determination of the location from the tag in the local tagstore in order to service a received storage operation associated with the data. Takeover nodes do not have to wait for a cache to repopulate organically, and can leverage the contents of a cache of a failover node to thereby improve performance following takeover events.

    Inline buffer for in-memory post package repair (PPR)

    公开(公告)号:US11989106B2

    公开(公告)日:2024-05-21

    申请号:US16711243

    申请日:2019-12-11

    Abstract: In a memory system, a memory device has a memory array with multiple rows of memory having logical addresses mapped to their physical addresses and at least one spare row not having a logical address mapped to its physical address. A controller detects a failure of one of the multiple rows of memory (“failure row”) and executes a post package repair (PPR) mode. The controller can be internal to the memory device or external to the memory device. The memory device includes an internal scratchpad to allow transfer of data contents from the failure row to the spare row. The controller can map the logical address of the failure row from the physical address of the failure row to the physical address of the spare row, transfer data contents from the failure row to the internal scratchpad, and transfer the data contents from the internal scratchpad to the spare row.

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