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    Microchip and Method for Manufacturing Microchip
    221.
    发明申请
    Microchip and Method for Manufacturing Microchip 审中-公开
    Microchip和Microchip制造方法

    公开(公告)号：US20110033348A1

    公开(公告)日：2011-02-10

    申请号：US12936820

    申请日：2009-04-07

    Applicant: Hiroshi Hirayama

    Inventor： Hiroshi Hirayama

    IPC: B01L3/00 ,  B32B37/02

    CPC classification number: B81C1/00119 ,  B81B2201/058 ,  B81C3/001 ,  B81C2201/019 ,  B81C2203/032 ,  G01N2035/00158 ,  Y10T156/10

    Abstract: A microchip has a resin substrate, which is provided with a first surface whereupon a channel groove is formed and a second surface on the opposite side to the first surface, and the microchip also has a resin film bonded on the first surface. A projection area is larger than the area of the first surface of the resin substrate when the resin substrate is viewed from a direction orthogonally intersecting with the first surface. Thus, warpage of the microchip can be suppressed at the time of thermally bonding the resin substrate and the resin film by a roller.

    Abstract translation: 微芯片具有树脂基板，该树脂基板设置有形成沟槽的第一表面和与第一表面相对的第二表面，并且微芯片还具有粘合在第一表面上的树脂膜。 当从与第一表面正交的方向观察树脂基板时，投影面积大于树脂基板的第一表面的面积。 因此，通过辊子热粘合树脂基板和树脂膜时，可以抑制微芯片的翘曲。

    Integrated sensor and circuitry
    225.
    发明授权
    Integrated sensor and circuitry 有权
    集成传感器和电路

    公开(公告)号：US07810394B2

    公开(公告)日：2010-10-12

    申请号：US12368691

    申请日：2009-02-10

    Applicant: Navid Yazdi

    Inventor： Navid Yazdi

    IPC: G01P15/125

    CPC classification number: G01P15/18 ,  B81B2201/0235 ,  B81C1/00253 ,  B81C2201/019 ,  G01C19/5719 ,  G01P1/023 ,  G01P15/0802 ,  G01P15/125 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/16195 ,  H01L2924/16235 ,  H01L2924/00014

    Abstract: A micromachined sensor having a capacitive sensing structure. The sensor includes a first substrate with first and second conductive layers separated by a buried insulator layer, and a member defined by the first and second conductive layers and the buried insulator layer. A first set of elements defined with the first conductive layer is connected to the member and includes first and second elements that are electrically isolated from each other by the buried insulator layer. A second set of elements is defined with the first conductive layer and capacitively coupled with the first set of elements. A second substrate is bonded to the first substrate so that the member and the first set of elements are movably supported above the second substrate. The second set of elements is anchored to the second substrate, and the first and second sets of elements are physically interconnected through the second substrate.

    Abstract translation: 具有电容感测结构的微机械传感器。 该传感器包括具有被埋入绝缘体层隔开的第一和第二导电层以及由第一和第二导电层和埋入绝缘体层限定的构件的第一衬底。 由第一导电层限定的第一组元件连接到构件，并且包括通过埋入绝缘体层彼此电绝缘的第一和第二元件。 用第一导电层限定第二组元件，并与第一组元件电容耦合。 第二衬底被结合到第一衬底，使得构件和第一组元件可移动地支撑在第二衬底上。 第二组元件锚定到第二基板，并且第一和第二组元件通过第二基板物理地互连。

    Integrated sensor and circuitry and process therefor
    228.
    发明授权
    Integrated sensor and circuitry and process therefor 有权
    集成传感器及其电路及其工艺

    公开(公告)号：US07732302B2

    公开(公告)日：2010-06-08

    申请号：US12033395

    申请日：2008-02-19

    Applicant: Navid Yazdi

    Inventor： Navid Yazdi

    IPC: H01L21/46

    CPC classification number: G01P15/18 ,  B81B2201/0235 ,  B81C1/00253 ,  B81C2201/019 ,  G01C19/5719 ,  G01P1/023 ,  G01P15/0802 ,  G01P15/125 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/16195 ,  H01L2924/16235 ,  H01L2924/00014

    Abstract: A micromachined sensor and a process for fabrication and vertical integration of a sensor and circuitry at wafer-level. The process entails processing a first wafer to incompletely define a sensing structure in a first surface thereof, processing a second wafer to define circuitry on a surface thereof, bonding the first and second wafers together, and then etching the first wafer to complete the sensing structure, including the release of a member relative to the second wafer. The first wafer is preferably a silicon-on-insulator (SOI) wafer, and the sensing structure preferably includes a member containing conductive and insulator layers of the SOI wafer. Sets of capacitively coupled elements are preferably formed from a first of the conductive layers to define a symmetric capacitive full-bridge structure.

    Abstract translation: 微机械传感器和晶圆级传感器和电路的制造和垂直集成工艺。 该过程需要处理第一晶片以在其第一表面中不完全地限定感测结构，处理第二晶片以在其表面上限定电路，将第一和第二晶片结合在一起，然后蚀刻第一晶片以完成感测结构 ，包括相对于第二晶片释放元件。 第一晶片优选为绝缘体上硅（SOI）晶片，并且感测结构优选地包括包含SOI晶片的导电层和绝缘体层的构件。 电容耦合元件的组优选地由第一导电层形成以限定对称的电容全桥结构。

    Vacuum packaged single crystal silicon device
    230.
    发明授权
    Vacuum packaged single crystal silicon device 失效

    公开(公告)号：US07662654B2

    公开(公告)日：2010-02-16

    申请号：US12164820

    申请日：2008-06-30

    Applicant: Ijaz H. Jafri ,  Galen P. Magendanz

    Inventor： Ijaz H. Jafri ,  Galen P. Magendanz

    IPC: H01L21/00

    CPC classification number: B81C1/00333 ,  B81B2201/0271 ,  B81C1/00142 ,  B81C2201/019 ,  B81C2203/036 ,  B81C2203/051 ,  H03H3/0072 ,  H03H9/1057 ,  H03H9/2405 ,  H03H9/2447 ,  H03H9/462 ,  H03H2009/02511

    Abstract: A method for forming a vibrating micromechanical structure having a single crystal silicon (SCS) micromechanical resonator formed using a two-wafer process, including either a Silicon-on-insulator (SOI) or insulating base and resonator wafers, wherein resonator anchors, capacitive air gap, isolation trenches, and alignment marks are micromachined in an active layer of the base wafer; the active layer of the resonator wafer is bonded directly to the active layer of the base wafer; the handle and dielectric layers of the resonator wafer are removed; windows are opened in the active layer of the resonator wafer; masking the active layer of the resonator wafer with photoresist; a SCS resonator is machined in the active layer of the resonator wafer using silicon dry etch micromachining technology; and the photoresist is subsequently dry stripped. A patterned SCS cover is bonded to the resonator wafer resulting in hermetically sealed chip scale wafer level vacuum packaged devices.

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