公开(公告)号：US20110252222A1

公开(公告)日：2011-10-13

申请号：US13081382

申请日：2011-04-06

Applicant: Olivier Van Nieuwenhuyze

Inventor： Olivier Van Nieuwenhuyze

IPC: G06F9/30

CPC classification number: G06F21/52 ,  G06F9/321 ,  G06F21/71 ,  G06F21/77 ,  G06F2201/86 ,  G06F2201/865 ,  G06F2201/88 ,  G06Q20/3563 ,  G07F7/1008

Abstract: The implementation of a counter in a microcontroller adapted to the JavaCard language while respecting the atomicity of a modification of the value of this counter, wherein the counter is reset by the sending to the microcontroller of an instruction to verify a user code by submitting a correct code, and the value of the counter is decremented by the sending to the microcontroller of the instruction to verify the user code with an erroneous code value.

Abstract translation: 在适应于JavaCard语言的微控制器中实现一个计数器，同时遵守对该计数器的值的修改的原子性，其中通过向微控制器发送指令来复位计数器，以通过提交正确的方式来验证用户代码 代码，并且通过向微控制器发送用于以错误代码值验证用户代码的指令来递减计数器的值。

公开(公告)号：US20110239031A1

公开(公告)日：2011-09-29

申请号：US13132094

申请日：2009-07-09

Applicant: Frederick A. Ware ,  Robert E. Palmer ,  John W. Poulton ,  Andrew M. Fuller

Inventor： Frederick A. Ware ,  Robert E. Palmer ,  John W. Poulton ,  Andrew M. Fuller

IPC: G06F1/00

CPC classification number: G06F1/3237 ,  G06F1/12 ,  G06F1/3225 ,  G06F1/324 ,  G06F3/0604 ,  G06F3/0625 ,  G06F3/0629 ,  G06F3/0673 ,  G06F9/3836 ,  G06F12/0857 ,  G06F13/1689 ,  G06F13/36 ,  G06F2201/88 ,  G11C7/04 ,  G11C7/10 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/1072 ,  G11C7/1078 ,  G11C7/109 ,  G11C7/1093 ,  G11C7/22 ,  G11C7/222 ,  G11C7/225 ,  G11C11/4076 ,  G11C11/4096 ,  G11C2207/2254 ,  Y02D10/14

Abstract: In a low-power signaling system, an integrated circuit device includes an open loop-clock distribution circuit and a transmit circuit that cooperate to enable high-speed transmission of information-bearing symbols unaccompanied by source-synchronous timing references. The open-loop clock distribution circuit generates a transmit clock signal in response to an externally-supplied clock signal, and the transmit circuit outputs a sequence of symbols onto an external signal line in response to transitions of the transmit clock signal. Each of the symbols is valid at the output of the transmit circuit for a symbol time and a phase offset between the transmit clock signal and the externally-supplied clock signal is permitted to drift by at least the symbol time.

Abstract translation: 在低功率信号系统中，集成电路装置包括开环时钟分配电路和发射电路，其协作以实现不受源同步定时参考而不伴随的信息载体的高速传输。 开环时钟分配电路响应于外部提供的时钟信号而产生发送时钟信号，并且发送电路响应于发送时钟信号的转换而将符号序列输出到外部信号线上。 每个符号在符号时间的发射电路的输出端是有效的，并且发射时钟信号和外部提供的时钟信号之间的相位偏移允许至少漂移符号时间。

公开(公告)号：US08024458B1

公开(公告)日：2011-09-20

申请号：US12121846

申请日：2008-05-16

Applicant: Chiranjeeb Buragohain

Inventor： Chiranjeeb Buragohain

IPC: G06F15/173

CPC classification number: G06F11/3495 ,  G06F11/3419 ,  G06F2201/875 ,  G06F2201/88

Abstract: Disclosed are various embodiments for tracking a frequency distribution of streamed values. A stream of monitoring values is generally received in a host from a plurality of external hosts. A frequency distribution is stored in the host, the frequency distribution comprising a plurality of ranges that vary exponentially, and a plurality of frequency values, each of the frequency values being associated with a corresponding one of the ranges. A frequency at which the monitoring values fall within respective ones of the ranges is tracked in the frequency distribution.

Abstract translation: 公开了用于跟踪流值的频率分布的各种实施例。 通常在主机中从多个外部主机接收监视值流。 频率分布存储在主机中，频率分布包括指数变化的多个范围，以及多个频率值，每个频率值与相应的一个范围相关联。 在频率分布中跟踪监视值落入相应范围内的频率。

公开(公告)号：US20110219118A1

公开(公告)日：2011-09-08

申请号：US13125661

申请日：2009-10-22

Applicant: John D. Cowan ,  Delano Seymour ,  Julian Carlington

Inventor： John D. Cowan ,  Delano Seymour ,  Julian Carlington

IPC: G06F15/16

CPC classification number: G06F11/3495 ,  G06F11/3409 ,  G06F11/3442 ,  G06F2201/815 ,  G06F2201/875 ,  G06F2201/88 ,  H04L43/022 ,  H04L43/04 ,  H04L43/0876

Abstract: A universal platform for utility computing that allows service providers to charge clients for the services rendered according to a dimensionless cross-platform universal metric. The platform measures or monitors six metrics commonly used in software computing (MHz for CPU usage, Mbytes for memory usage, Kbytes/sec for I/O, Kbytes/sec for LAN, Kbits/sec for WAN and Gbytes for storage) and applies appropriate weighting and conversion factors to each consumption value to a value in the universal metric that can be applied agnostically to any system or application. The metric can also take other controllable variables into account, such as real estate cost, tax jurisdiction and electrical power. The metric effectively a metric makes diverse computing resources comparable. The total value of the resources consumed by a user determines the cost charged for the use of the computing services.

Abstract translation: 一种实用计算的通用平台，允许服务提供商根据无量纲的跨平台通用度量为客户端提供服务。 该平台衡量或监测软件计算中常用的六个度量（CPU使用率为MHz，内存使用Mbytes，I / O为Kbytes /秒，LAN为Kbytes /秒，WAN为Kbits /秒，存储为Gbytes），并适用 将每个消费值的加权和转换因子转换为可以应用于任何系统或应用程序的通用度量值。 该指标还可以考虑其他可控变量，例如房地产成本，税务管辖权和电力。 该指标有效地衡量了各种计算资源的可比性。 用户消耗的资源的总价值决定了使用计算服务收取的费用。

公开(公告)号：US20110213997A1

公开(公告)日：2011-09-01

申请号：US12714416

申请日：2010-02-26

Applicant: Aman Kansal ,  Jie Liu ,  Douglas C. Burger ,  Arka Aloke Bhattacharya

Inventor： Aman Kansal ,  Jie Liu ,  Douglas C. Burger ,  Arka Aloke Bhattacharya

IPC: G06F1/00

CPC classification number: G06F1/3234 ,  G01R21/133 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/329 ,  G06F11/3409 ,  G06F11/3423 ,  G06F11/3447 ,  G06F11/3466 ,  G06F2201/815 ,  G06F2201/865 ,  G06F2201/88 ,  Y02D10/34

Abstract: Embodiments of the virtual machine power metering system and method measure the power consumption of individual virtual machines. Power meter measurements for a physical host server are converted into individual virtual machine power meters that measure the power consumption of each individual virtual machine residing on the host server. The virtual machine power consumption is computed by generating a power model using the total power consumption of the host server and resource utilization for a virtual machine. Optimal power model coefficients are computed using the power model. The energy used by the virtual machine is computed using one of two embodiments. Embodiments of the system and method also can be used to obtain the power consumption for a specific activity (such as a service, request, or search query). In addition, the virtual machine power metering can be used for virtual machine power capping to allow power oversubscription in virtualized environments.

Abstract translation: 虚拟机功率计量系统和方法的实施例测量各个虚拟机的功耗。 将物理主机服务器的功率计测量值转换为单独的虚拟机功率计，以测量驻留在主机服务器上的每个虚拟机的功耗。 通过使用主机服务器的总功耗和虚拟机的资源利用率生成功率模型来计算虚拟机功耗。 使用功率模型计算最佳功率模型系数。 使用两个实施例中的一个来计算虚拟机使用的能量。 系统和方法的实施例也可用于获得特定活动（例如服务，请求或搜索查询）的功耗。 此外，虚拟机功率计量可用于虚拟机功率封顶，以允许虚拟化环境中的电力超额认购。

公开(公告)号：US07984348B2

公开(公告)日：2011-07-19

申请号：US12511983

申请日：2009-07-29

Applicant: Gary L. Swoboda

Inventor： Gary L. Swoboda

IPC: G01R31/28

CPC classification number: G01R31/3177 ,  G01R31/31701 ,  G01R31/31713 ,  G01R31/31723 ,  G01R31/31727 ,  G01R31/318533 ,  G01R31/318538 ,  G01R31/318544 ,  G06F11/22 ,  G06F11/267 ,  G06F11/27 ,  G06F11/36 ,  G06F11/3656 ,  G06F2201/88 ,  H04L43/50

Abstract: Performing series equivalent scans spanning a plurality of scan technologies in a complex scan topology may be performed by performing shift operations in the complex scan topology while only one branch of the complex scan topology connectivity is enabled, and performing capture and update operations in parallel while scan topology connectivity of two or more of the plurality of scan technologies is enabled.

Abstract translation: 可以通过在复杂扫描拓扑中执行移位操作来执行跨复杂扫描拓扑中的多个扫描技术的系列等效扫描，同时仅启用复扫描拓扑连接的一个分支，并且在扫描期间并行执行捕获和更新操作 启用多个扫描技术中的两个或更多个的拓扑连接。

公开(公告)号：US20110173413A1

公开(公告)日：2011-07-14

申请号：US12723277

申请日：2010-03-12

Applicant: Dong Chen ,  Paul W. Coteus ,  Noel A. Eisley ,  Alan Gara ,  Philip Heidleberger ,  Robert M. Senger ,  Valentina Salapura ,  Burkhard Steinmacher-Burow ,  Yutaka Sugawara ,  Todd E. Takken

Inventor： Dong Chen ,  Paul W. Coteus ,  Noel A. Eisley ,  Alan Gara ,  Philip Heidleberger ,  Robert M. Senger ,  Valentina Salapura ,  Burkhard Steinmacher-Burow ,  Yutaka Sugawara ,  Todd E. Takken

IPC: G06F15/80 ,  G06F9/06 ,  G06F9/46

CPC classification number: G06F9/30021 ,  G06F9/3001 ,  G06F9/30018 ,  G06F9/30145 ,  G06F11/3024 ,  G06F11/3409 ,  G06F11/348 ,  G06F15/17362 ,  G06F15/17381 ,  G06F15/17393 ,  G06F2201/88 ,  H04L67/10

Abstract: Embodiments of the invention provide a method, system and computer program product for embedding a global barrier and global interrupt network in a parallel computer system organized as a torus network. The computer system includes a multitude of nodes. In one embodiment, the method comprises taking inputs from a set of receivers of the nodes, dividing the inputs from the receivers into a plurality of classes, combining the inputs of each of the classes to obtain a result, and sending said result to a set of senders of the nodes. Embodiments of the invention provide a method, system and computer program product for embedding a collective network in a parallel computer system organized as a torus network. In one embodiment, the method comprises adding to a torus network a central collective logic to route messages among at least a group of nodes in a tree structure.

Abstract translation: 本发明的实施例提供了一种用于在被组织为环面网络的并行计算机系统中嵌入全局屏障和全局中断网络的方法，系统和计算机程序产品。 计算机系统包括多个节点。 在一个实施例中，该方法包括从节点的一组接收器中获取输入，将来自接收器的输入划分为多个类，组合每个类的输入以获得结果，并将所述结果发送到一组 的节点的发送者。 本发明的实施例提供了一种用于将集体网络嵌入组织为环面网络的并行计算机系统中的方法，系统和计算机程序产品。 在一个实施例中，该方法包括向环形网络添加集中逻辑以在树结构中的至少一组节点之间路由消息。

公开(公告)号：US20110172968A1

公开(公告)日：2011-07-14

申请号：US12684738

申请日：2010-01-08

Applicant: Kristan D. Davis ,  Kahn C. Evans ,  Alan Gara ,  David L. Satterfield

Inventor： Kristan D. Davis ,  Kahn C. Evans ,  Alan Gara ,  David L. Satterfield

IPC: G21C17/00

CPC classification number: G06F13/4247 ,  G06F9/30145 ,  G06F11/3476 ,  G06F11/348 ,  G06F11/3495 ,  G06F12/0897 ,  G06F2201/88 ,  G06F2221/2117

Abstract: A plurality of first performance counter modules is coupled to a plurality of processing cores. The plurality of first performance counter modules is operable to collect performance data associated with the plurality of processing cores respectively. A plurality of second performance counter modules are coupled to a plurality of L2 cache units, and the plurality of second performance counter modules are operable to collect performance data associated with the plurality of L2 cache units respectively. A central performance counter module may be operable to coordinate counter data from the plurality of first performance counter modules and the plurality of second performance modules, the a central performance counter module, the plurality of first performance counter modules, and the plurality of second performance counter modules connected by a daisy chain connection.

Abstract translation: 多个第一性能计数器模块耦合到多个处理核心。 多个第一性能计数器模块可操作以分别收集与多个处理核心相关联的性能数据。 多个第二性能计数器模块耦合到多个L2高速缓存单元，并且所述多个第二性能计数器模块可操作以分别收集与所述多个L2高速缓存单元相关联的性能数据。 中央性能计数器模块可以用于协调来自多个第一性能计数器模块和多个第二性能模块的计数器数据，中央性能计数器模块，多个第一性能计数器模块和多个第二性能计数器 模块通过菊花链连接连接。

公开(公告)号：US20110167288A1

公开(公告)日：2011-07-07

申请号：US13064183

申请日：2011-03-09

Applicant: Kenji Okano

Inventor： Kenji Okano

IPC: G06F1/32

CPC classification number: G06F1/3203 ,  G06F1/20 ,  G06F1/3243 ,  G06F1/3287 ,  G06F11/3409 ,  G06F11/3476 ,  G06F2201/88 ,  Y02D10/152 ,  Y02D10/171 ,  Y02D10/34

Abstract: An information obtaining unit provided inside a system controller obtains operation states of processing units and processing units respectively of cabinets, calculates an average utilization of CPUs of the processing units, and determines whether or not any processing unit can be disconnected. When a hardware resource can be disconnected as a result of the determination, an electric power control determining unit calculates possible combinations of hardware resources to be disconnected and performs a disconnection by a cabinet unit when there is a combination enabling a disconnection by a cabinet unit.

Abstract translation: 设置在系统控制器内部的信息获取单元分别获取机柜的处理单元和处理单元的操作状态，计算处理单元的CPU的平均利用率，并确定是否可以断开任何处理单元。 当确定硬件资源可以断开时，电力控制确定单元计算要断开的硬件资源的可能组合，并且当存在通过柜单元断开的组合时，由机柜单元执行断开连接。

公开(公告)号：US20110167239A1

公开(公告)日：2011-07-07

申请号：US12652688

申请日：2010-01-05

Applicant: Deric Horn ,  Donald James Brady ,  David Alexander Majnemer ,  Eric Brandon Tamura

Inventor： Deric Horn ,  Donald James Brady ,  David Alexander Majnemer ,  Eric Brandon Tamura

IPC: G06F12/02 ,  G06F12/00

CPC classification number: G06F17/30129 ,  G06F11/34 ,  G06F2201/865 ,  G06F2201/88

Abstract: Methods and apparatuses that maintain an access history of a file allocated with allocation blocks in storage devices are described. In response to receiving a usage request to allocate additional space for the file, an allocation block size may be adjusted or adapted based on the access history. The storage devices may be allocated with one or more allocation blocks using the adapted allocation block size to provide requested space for the file.

Abstract translation: 描述在存储设备中维护分配有分配块的文件的访问历史的方法和装置。 响应于接收到为文件分配额外空间的使用请求，可以基于访问历史来调整或调整分配块大小。 可以使用适配的分配块大小来为存储设备分配一个或多个分配块，以为文件提供所请求的空间。