BUMPLESS FLIP CHIP ASSEMBLY WITH STRIPS-IN-VIA AND PLATING
    22.
    发明申请
    BUMPLESS FLIP CHIP ASSEMBLY WITH STRIPS-IN-VIA AND PLATING 失效
    无冲击芯片组装,具有穿孔和镀层

    公开(公告)号:US20020005591A1

    公开(公告)日:2002-01-17

    申请号:US09464561

    申请日:1999-12-16

    Inventor: CHARLES W.C. LIN

    Abstract: A flip chip assembly, and methods of forming the same, including a single or multi-layer substrate having a plurality of via holes or apertures of which preformed strips or wires inside the via holes serve as the connections between the semiconductor device and substrate circuitry. The assembling steps may include attaching an integrated circuit (IC) chip or chips to a rigid or flexible substrate circuitry having a plurality of pre-formed strips extended from the patterned circuitry and hanging inside a plurality of through holes. These through holes are aligned and placed on top of the terminal pads so that the respective traces on the substrate can be connected with the respective input/output terminal pads of the IC chip through the leads inside the via holes. After attachment, electrically conductive material is subsequently connected to these leads to the IC terminal pads through electrolytic plating, electroless (chemical) plating or solder re-flow processes. The joining material can provide mechanical support as well as electrical continuity between IC chip and the circuitry of the substrate.

    Abstract translation: 一种倒装芯片组件及其形成方法,包括具有多个通孔或孔的单层或多层基板,其中通孔内的预制条或导线用作半导体器件与衬底电路之间的连接。 组装步骤可以包括将集成电路(IC)芯片或芯片附接到具有从图案化电路延伸并且悬挂在多个通孔内的多个预成形条的刚性或柔性基板电路。 这些通孔对齐并放置在端子焊盘的顶部上,使得衬底上的各个迹线可以通过通孔内的引线与IC芯片的相应输入/输出端子焊盘连接。 附着后,导电材料随后通过电镀,无电镀(化学镀)或焊料回流工艺连接到这些引线到IC端子焊盘。 接合材料可以提供机械支撑以及IC芯片和基板的电路之间的电连续性。

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