公开(公告)号：US20120094442A1

公开(公告)日：2012-04-19

申请号：US13337164

申请日：2011-12-26

Applicant: Charles W.C. Lin ,  Chia-Chung Wang

Inventor： Charles W.C. Lin ,  Chia-Chung Wang

IPC: H01L21/60

CPC classification number: H05K1/021 ,  H01L21/486 ,  H01L23/3677 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L33/483 ,  H01L33/642 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01087 ,  H01L2924/12041 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2924/3025 ,  H05K3/4084 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/10106 ,  H05K2203/049 ,  H05K2203/063 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of making a semiconductor chip assembly includes providing a bump and a ledge, mounting a first adhesive on the ledge including inserting the bump into an opening in the first adhesive, mounting a conductive layer on the first adhesive including aligning the bump with an aperture in the conductive layer, then flowing the first adhesive between the bump and the conductive layer, solidifying the first adhesive, then providing a heat spreader that includes the bump, a base and the ledge, then mounting a second adhesive on the ledge, mounting a conductive trace that includes a pad and a terminal on the second adhesive, then mounting a semiconductor device on the bump in a cavity in the bump, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract translation: 制造半导体芯片组件的方法包括提供凸块和凸缘，将第一粘合剂安装在凸缘上，包括将凸块插入第一粘合剂中的开口中，将导电层安装在第一粘合剂上，包括使凸块与孔 在导电层中，然后使第一粘合剂在凸起和导电层之间流动，固化第一粘合剂，然后提供包括凸块，底座和凸缘的散热器，然后将第二粘合剂安装在凸缘上， 导电迹线，其包括第二粘合剂上的焊盘和端子，然后将凸块中的半导体器件安装在凸块中的空腔中，将半导体器件电连接到导电迹线并将半导体器件热连接到散热器。

公开(公告)号：US20110227122A1

公开(公告)日：2011-09-22

申请号：US13111966

申请日：2011-05-20

Applicant: Charles W.C. Lin ,  Chia-Chung Wang ,  Ming Yu Shih

Inventor： Charles W.C. Lin ,  Chia-Chung Wang ,  Ming Yu Shih

IPC: H01L33/62 ,  H01L23/48

CPC classification number: H01L21/486 ,  H01L23/3677 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L33/483 ,  H01L33/642 ,  H01L2224/2919 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83855 ,  H01L2224/85207 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/0204 ,  H05K3/0061 ,  H05K2201/09054 ,  H05K2201/10106 ,  H05K2203/0369 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace, an adhesive and a support layer. The heat spreader includes a post, a base, an underlayer and a thermal via. The conductive trace includes a pad and a terminal. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive, the base extends laterally from the post, the support layer is sandwiched between the base and the underlayer and the thermal via extends from the base through the support layer to the underlayer. The conductive trace provides signal routing between the pad and the terminal.

Abstract translation: 半导体芯片组件包括半导体器件，散热器，导电迹线，粘合剂和支撑层。 散热器包括柱，基座，​​底层和热通孔。 导电迹线包括焊盘和端子。 半导体器件电连接到导电迹线并热连接到散热器。 柱从基部向上延伸到粘合剂中的开口中，基部从柱延伸，支撑层夹在基部和底层之间，并且热通孔从基部延伸穿过支撑层到底层。 导电迹线提供焊盘和端子之间的信号路由。

公开(公告)号：US20110175136A1

公开(公告)日：2011-07-21

申请号：US13078928

申请日：2011-04-02

Applicant: Charles W.C. Lin ,  Chia-Chung Wang

Inventor： Charles W.C. Lin ,  Chia-Chung Wang

IPC: H01L33/64

CPC classification number: H01L21/486 ,  H01L23/3677 ,  H01L24/16 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L33/483 ,  H01L33/642 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83855 ,  H01L2224/85207 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12041 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/0204 ,  H05K3/0061 ,  H05K2201/09054 ,  H05K2201/10106 ,  H05K2203/0369 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a post and a base. The conductive trace includes a pad, a terminal and a plated through-hole. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive, and the base extends laterally from the post. The conductive trace provides signal routing between the pad and the terminal using the plated through-hole.

Abstract translation: 半导体芯片组件包括半导体器件，散热器，导电迹线和粘合剂。 散热器包括一个柱子和一个底座。 导电迹线包括焊盘，端子和电镀通孔。 半导体器件电连接到导电迹线并热连接到散热器。 柱从基部向上延伸到粘合剂中的开口中，并且基部从柱横向延伸。 导电迹线使用电镀通孔在焊盘和端子之间提供信号路由。

公开(公告)号：US20110104856A1

公开(公告)日：2011-05-05

申请号：US13004881

申请日：2011-01-12

Applicant: Charles W.C. Lin ,  Chia-Chung Wang

Inventor： Charles W.C. Lin ,  Chia-Chung Wang

IPC: H01L21/50

CPC classification number: H01L21/486 ,  H01L23/3677 ,  H01L24/28 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L33/486 ,  H01L33/642 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32013 ,  H01L2224/32188 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83855 ,  H01L2224/85205 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12041 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/0204 ,  H05K1/056 ,  H05K3/445 ,  H05K2201/09054 ,  H05K2201/10106 ,  H05K2203/0369 ,  H05K2203/063 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method of making a semiconductor chip assembly includes providing first and second posts, first and second adhesives and a base, wherein the first post extends from the base in a first vertical direction into a first opening in the first adhesive, the second post extends from the base in a second vertical direction into a second opening in the second adhesive and the base is sandwiched between and extends laterally from the posts, then flowing the first adhesive in the first vertical direction and the second adhesive in the second vertical direction, solidifying the adhesives, then providing a conductive trace that includes a pad and a terminal, wherein the pad extends beyond the base in the first vertical direction and the terminal extends beyond the base in the second vertical direction, providing a heat spreader that includes the posts and the base, then mounting a semiconductor device on the first post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract translation: 制造半导体芯片组件的方法包括提供第一和第二柱，第一和第二粘合剂和基底，其中第一柱从第一垂直方向上的基部延伸到第一粘合剂中的第一开口中，第二柱从 在第二垂直方向上的基部到第二粘合剂中的第二开口中，并且基部被夹在柱之间并从支柱横向延伸，然后使第一粘合剂在第一垂直方向上流动，并使第二粘合剂沿第二垂直方向流动， 粘合剂，然后提供包括垫和端子的导电迹线，其中所述垫在所述第一垂直方向上延伸超出所述基部，并且所述端子在所述第二垂直方向上延伸超出所述基部，从而提供包括所述柱和 然后将半导体器件安装在第一柱上，将半导体器件电连接到导电迹线上 将半导体器件热连接到散热器上。

公开(公告)号：US20110104855A1

公开(公告)日：2011-05-05

申请号：US12978421

申请日：2010-12-24

Applicant: Charles W.C. Lin ,  Chia-Chung Wang

Inventor： Charles W.C. Lin ,  Chia-Chung Wang

IPC: H01L21/50

CPC classification number: H01L23/60 ,  H01L23/142 ,  H01L23/3677 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/28 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L33/486 ,  H01L33/62 ,  H01L33/642 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32013 ,  H01L2224/32188 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83851 ,  H01L2224/83855 ,  H01L2224/85205 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/01007 ,  H01L2924/01031 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/01026 ,  H01L2924/0104 ,  H01L2924/01033 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method of making a semiconductor chip assembly includes providing a post, a base, an ESD protection layer and a metal layer, wherein the post extends above the base and the ESD protection layer is sandwiched between the base and the metal layer, mounting an adhesive on the base including inserting the post into an opening in the adhesive, mounting a conductive layer on the adhesive including aligning the post with an aperture in the conductive layer, then flowing the adhesive upward between the post and the conductive layer, solidifying the adhesive, then providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer, providing a heat spreader that includes the post, the base, the ESD protection layer and an underlayer that includes at least a portion of the metal layer, then mounting a semiconductor device on the post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract translation: 制造半导体芯片组件的方法包括提供柱，基底，ESD保护层和金属层，其中柱延伸到基底之上，并且ESD保护层夹在基底和金属层之间，安装粘合剂 在基座上包括将柱插入粘合剂的开口中，将导电层安装在粘合剂上，包括使该柱与导电层中的孔对准，然后使粘合剂在柱和导电层之间向上流动，使粘合剂固化， 然后提供包括导电层的焊盘，端子和选定部分的导电迹线，提供包括柱，基底，ESD保护层和底层的散热器，所述底层包括金属层的至少一部分 ，然后将半导体器件安装在柱上，将半导体器件电连接到导电迹线并热连接半导体器件 e到散热器。

公开(公告)号：US20100203679A1

公开(公告)日：2010-08-12

申请号：US12714495

申请日：2010-02-28

Applicant: Charles W.C. Lin ,  Chia-Chung Wang ,  Sangwhoo Lim

Inventor： Charles W.C. Lin ,  Chia-Chung Wang ,  Sangwhoo Lim

IPC: H01L21/58

CPC classification number: H01L21/486 ,  H01L23/3677 ,  H01L33/483 ,  H01L33/642 ,  H01L2224/32188 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12041 ,  H01L2924/16152 ,  H01L2924/19041 ,  H05K1/021 ,  H05K1/182 ,  H05K3/0061 ,  H05K2201/09054 ,  H05K2201/10106 ,  H05K2203/0369 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post into an opening in the adhesive, mounting a substrate on the adhesive including aligning the post with an aperture in the substrate, then flowing the adhesive into and upward in a gap located in the aperture between the post and the substrate, solidifying the adhesive, then etching the post to form a cavity in the adhesive above the post, then mounting a semiconductor device on the post, wherein a heat spreader includes the post and the base and the semiconductor device extends into the cavity, electrically connecting the semiconductor device to the substrate and thermally connecting the semiconductor device to the heat spreader.

Abstract translation: 制造半导体芯片组件的方法包括提供柱和基座，将粘合剂安装在基座上，包括将柱插入粘合剂中的开口中，将基底安装在粘合剂上，包括使柱与基底中的孔对准， 然后将粘合剂在位于柱和基底之间的孔中的间隙中向上流动，固化粘合剂，然后蚀刻柱以在柱上方的粘合剂中形成空腔，然后将半导体器件安装在柱上，其中 散热器包括柱和基座，并且半导体器件延伸到空腔中，将半导体器件电连接到衬底并将半导体器件热连接到散热器。

公开(公告)号：US20100075448A1

公开(公告)日：2010-03-25

申请号：US12626940

申请日：2009-11-30

Applicant: Charles W.C. Lin ,  Chia-Chung Wang ,  David M. Sigmond

Inventor： Charles W.C. Lin ,  Chia-Chung Wang ,  David M. Sigmond

IPC: H01L33/00 ,  H01L23/48 ,  H01L23/36

CPC classification number: H01L21/486 ,  H01L23/3677 ,  H01L24/45 ,  H01L24/48 ,  H01L33/483 ,  H01L33/642 ,  H01L2224/32188 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H05K1/0204 ,  H05K3/0061 ,  H05K2201/09054 ,  H05K2201/10106 ,  H05K2203/0369 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post into an opening in the adhesive, mounting a conductive layer on the adhesive including aligning the post with an aperture in the conductive layer, then flowing the adhesive into and upward in a gap located in the aperture between the post and the conductive layer, solidifying the adhesive, then providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer, providing a cap on the post, mounting a semiconductor device on a heat spreader that includes the post, the base and the cap, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract translation: 一种制造半导体芯片组件的方法包括提供柱和基座，在基底上安装粘合剂，包括将柱插入粘合剂中的开口中，将导电层安装在粘合剂上，包括使导柱与导电 层，然后使粘合剂在位于柱和导电层之间的孔中的间隙中向上流动，固化粘合剂，然后提供包括导电层的焊盘，端子和选定部分的导电迹线，提供 在支柱上的盖子，将半导体器件安装在包括柱，基座和盖子的散热器上，将半导体器件电连接到导电迹线并将半导体器件热连接到散热器。

公开(公告)号：US20100003788A1

公开(公告)日：2010-01-07

申请号：US12558527

申请日：2009-09-13

Applicant: Chia-Chung Wang ,  Charles W.C. Lin

Inventor： Chia-Chung Wang ,  Charles W.C. Lin

IPC: H01L21/50

CPC classification number: H05K1/0206 ,  H01L23/3677 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L33/483 ,  H01L33/62 ,  H01L33/642 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01087 ,  H01L2924/12041 ,  H01L2924/181 ,  H05K1/112 ,  H05K3/06 ,  H05K3/4652 ,  H05K2201/0352 ,  H05K2201/09736 ,  H05K2201/10106 ,  H05K2201/10553 ,  H05K2203/0369 ,  H05K2203/049 ,  H05K2203/0733 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: The present invention provides a method of making a semiconductor chip assembly that includes providing a post and a base, mounting an adhesive on the base including inserting the post through an opening in the adhesive, mounting a substrate on the adhesive including inserting the post into an aperture in the substrate to form a gap in the aperture between the post and the substrate, then flowing the adhesive into and upward in the gap, solidifying the adhesive, then mounting a semiconductor device on a heat spreader that includes the post and the base, electrically connecting the semiconductor device to the substrate and thermally connecting the semiconductor device to the heat spreader. The substrate includes first and second conductive layers and a dielectric layer therebetween, and the assembly provides the vertical signal routing between a pad at the first conductive layer and a terminal below the adhesive.

Abstract translation: 本发明提供了一种制造半导体芯片组件的方法，该半导体芯片组件包括提供柱和底座，将粘合剂安装在基座上，包括将柱穿过粘合剂中的开口插入，将基底安装在粘合剂上，包括将柱插入 在基板之间的孔中形成间隙，然后使粘合剂在间隙中向上流动，固化粘合剂，然后将半导体器件安装在包括柱和基座的散热器上， 将半导体器件电连接到衬底并将半导体器件热连接到散热器上。 衬底包括第一和第二导电层以及它们之间的介电层，并且组件提供在第一导电层处的衬垫和粘合剂下方的端子之间的垂直信号路由。

公开(公告)号：US20090218588A1

公开(公告)日：2009-09-03

申请号：US12327910

申请日：2008-12-04

Applicant: Paul Panaccione ,  Charles W.C. Lin ,  Chia-Chung Wang ,  Cheng-Chung Chen

Inventor： Paul Panaccione ,  Charles W.C. Lin ,  Chia-Chung Wang ,  Cheng-Chung Chen

IPC: H01L33/00 ,  H01L21/50

CPC classification number: H01L33/486 ,  H01L33/54 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Light-emitting devices, and related components, systems, and methods associated therewith are provided. A light-emitting device can comprise a light-emitting die comprising a light-generating region capable of generating light and an emission surface through which generated light is capable of being emitted, and a package layer at least partially disposed over at least a portion of the light-emitting die emission surface, wherein the package layer has an aperture through which light from the light-emitting die is capable of being emitted. The light-emitting device can be a chip-scale packaged device where the device area can be less than 3 times the light-emitting die emission surface area and/or the device thickness can be less than 2 times the light-emitting die thickness.

Abstract translation: 提供了发光器件以及与之相关的组件，系统和方法。 发光装置可以包括发光管芯，其包括能够产生光的发光区域和能够发射产生的光的发射表面，以及至少部分地设置在至少一部分 发光管芯发射表面，其中封装层具有能够发射来自发光管芯的光的孔。 发光装置可以是芯片级封装器件，其中器件面积可以小于发光管芯发射表面积的3倍，和/或器件厚度可以小于发光管芯厚度的2倍。

公开(公告)号：US20020125581A1

公开(公告)日：2002-09-12

申请号：US09852821

申请日：2001-05-10

Applicant: Charles W.C. Lin.

Inventor： Charles W.C. Lin

IPC: H01L023/488 ,  H01L023/528

CPC classification number: H01L24/02 ,  H01L24/31 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2224/9202 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00

Abstract: A flip chip assembly, and methods of forming the same, including a single or multi-layer substrate having a plurality of via holes which serve as the connection between the semiconductor device and substrate circuitry. The method of manufacturing the flip chip assembly includes the steps of attaching an integrated circuit (IC) chip having a plurality of input/output terminal pads to a rigid or flexible substrate having a plurality of via holes. The via holes are aligned with the terminal pads so that the respective traces on the substrate can be connected to the respective terminal pads through the via holes. After attachment, the pre-deposited solder inside the via holes or on the terminal pads is re-flowed. This re-flow soldering process electrically connects the IC chip to the substrate. The solder can be deposited by plating, wave soldering, meniscus coating, and screen printing techniques.