公开(公告)号：US20080030692A1

公开(公告)日：2008-02-07

申请号：US11462413

申请日：2006-08-04

Applicant: Hsien-Cheng WANG ,  Chin-Hsiang LIN ,  H. J. LEE ,  Ching-Yu CHANG ,  Hua-Tai LIN ,  Burn Jeng LIN

Inventor： Hsien-Cheng WANG ,  Chin-Hsiang LIN ,  H. J. LEE ,  Ching-Yu CHANG ,  Hua-Tai LIN ,  Burn Jeng LIN

IPC: G03F7/26

CPC classification number: G03F7/0397 ,  G03F7/0045 ,  G03F7/0392 ,  G03F7/30 ,  G03F7/38 ,  G03F7/70858 ,  Y10S430/106 ,  Y10S430/111

Abstract: A material for use in lithography processing includes a polymer that turns soluble to a base solution in response to reaction with acid and a plurality of magnetically amplified generators (MAGs) each having a magnetic element and each decomposing to form acid bonded with the magnetic element in response to radiation energy.

Abstract translation: 用于光刻处理的材料包括响应于与酸的反应而变成可溶于碱溶液的聚合物和多个具有磁性元素的磁放大发生器（MAG），并分别与磁性元件形成酸结合 响应辐射能量。

公开(公告)号：US20070264594A1

公开(公告)日：2007-11-15

申请号：US11746202

申请日：2007-05-09

Applicant: Ching-Yu Chang ,  Heng-Jen Lee ,  Chin-Hsiang Lin ,  Hua-Tai Lin ,  Kuei Shun Chen ,  Bang-Chein Ho ,  Li-Kong Turn ,  Hung-Jui Kuo ,  Ko-Bin Kao ,  Tsung-Chih Chien

Inventor： Ching-Yu Chang ,  Heng-Jen Lee ,  Chin-Hsiang Lin ,  Hua-Tai Lin ,  Kuei Shun Chen ,  Bang-Chein Ho ,  Li-Kong Turn ,  Hung-Jui Kuo ,  Ko-Bin Kao ,  Tsung-Chih Chien

IPC: G03F7/40

CPC classification number: G03F7/40

Abstract: A method of inhibiting photoresist pattern collapse which includes the steps of providing a substrate; providing a photoresist layer on the substrate; exposing and developing the photoresist layer; applying a top anti-reflective coating layer to the photoresist layer; rinsing the photoresist layer; and drying the photoresist layer.

Abstract translation: 一种抑制光致抗蚀剂图案塌陷的方法，包括提供基底的步骤; 在衬底上提供光致抗蚀剂层; 曝光和显影光致抗蚀剂层; 将顶部抗反射涂层施加到光致抗蚀剂层上; 冲洗光刻胶层; 并干燥光刻胶层。

公开(公告)号：US20060183027A1

公开(公告)日：2006-08-17

申请号：US11060197

申请日：2005-02-17

Applicant: Hua-Tai Lin ,  J. Chen ,  Chih-Kung Chang

Inventor： Hua-Tai Lin ,  J. Chen ,  Chih-Kung Chang

IPC: H01L31/0232

CPC classification number: H01L27/14685 ,  H01L27/14627

Abstract: A method of manufacturing a microlens includes forming a photoresist layer over a substrate having a photo sensor located therein and exposing the photoresist layer in an exposure system having a lower resolution. The exposure uses a photomask having a microlens pattern comprising a plurality of dark regions and clear regions alternately disposed. The photoresist is developed to from the microlens having a curved shape.

Abstract translation: 制造微透镜的方法包括在具有位于其中的光电传感器的衬底上形成光致抗蚀剂层，并且在具有较低分辨率的曝光系统中曝光光致抗蚀剂层。 曝光使用具有交替布置的包括多个暗区域和透明区域的微透镜图案的光掩模。 光致抗蚀剂从具有弯曲形状的微透镜显影。

公开(公告)号：US06492073B1

公开(公告)日：2002-12-10

申请号：US09839926

申请日：2001-04-23

Applicant: Burn Jeng Lin ,  Ru-Gun Liu ,  Shih-Ying Chen ,  Shinn-Sheng Yu ,  Hua-Tai Lin ,  Anthony Yen ,  Yao-Ching Ku

Inventor： Burn Jeng Lin ,  Ru-Gun Liu ,  Shih-Ying Chen ,  Shinn-Sheng Yu ,  Hua-Tai Lin ,  Anthony Yen ,  Yao-Ching Ku

IPC: G03F900

CPC classification number: G03F1/36 ,  G03F1/70 ,  G03F7/70433 ,  G03F7/70441

Abstract: A mask set of two masks and a method of using these masks in a double exposure to avoid line shortening due to optical proximity effects is described. A pattern having pattern elements comprising a number of line segments, wherein each of the line segments has one or two free ends which are not connected to other mask pattern elements is to be transferred to a layer of resist. A first mask is formed by adding line extensions to each of the free ends of the line segments. A cutting mask is formed comprising rectangles enclosing each of the line extensions wherein one of the sides of said rectangles is coincident with the corresponding free end of said line segment. The first mask has opaque regions corresponding to the extended line segments. The cutting mask has transparent regions corresponding to the cutting pattern. In another embodiment a pattern having pattern openings comprising a number of line segments. In this embodiment the cutting pattern comprises rectangles having the same width as said line segments and add length to the line segments.

Abstract translation: 描述了两个掩模的掩模组和在双重曝光中使用这些掩模以避免由于光学邻近效应引起的线缩短的方法。 具有包括多个线段的图形元素的图案，其中每个线段具有未连接到其它掩模图案元件的一个或两个自由端将被转移到抗蚀剂层。 通过向线段的每个自由端添加线延伸来形成第一掩模。 形成切割掩模，其包括围绕每个线延伸的矩形，其中所述矩形的一个侧面与所述线段的对应的自由端重合。 第一掩模具有对应于延伸线段的不透明区域。 切割掩模具有对应于切割图案的透明区域。 在另一个实施例中，具有包括多个线段的图案开口的图案。 在该实施例中，切割图案包括具有与所述线段相同宽度的矩形，并且对线段增加长度。

公开(公告)号：US5982044A

公开(公告)日：1999-11-09

申请号：US66013

申请日：1998-04-24

Applicant: Hua-Tai Lin ,  Gwo-Yuh Shiau ,  Pin-Ting Wang

Inventor： Hua-Tai Lin ,  Gwo-Yuh Shiau ,  Pin-Ting Wang

IPC: G03F9/00 ,  H01L23/544

CPC classification number: G03F9/7092 ,  G03F9/708 ,  G03F9/7084 ,  H01L23/544 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54493 ,  H01L2924/0002 ,  Y10S148/102

Abstract: Novel triangular alignment marks and a novel algorithm are used to provide improved global alignment of the substrate on a substrate stage in an align-and expose tool. The method provides an improved metrology for aligning to a recessed alignment mark in the substrate having a material layer, such as insulating, polysilicon, and conducting layers that are inadvertently made asymmetric by processing such as chemical/mechanically polishing. The method also employs an algorithm that detects the recessed edges of the triangle and mathematically generates three lines representing the edges of the triangle. The algorithm then generates a family of lines moving inward from the edges of the triangular alignment marks and parallel to the edges until the lines converge to a common point which determines the alignment center for the triangular alignment marks. The algorithm uses the coordinates of the alignment center to position the substrate in the exposure tool for a coarse alignment the photomask for exposing a photoresist layer on the substrate. This new alignment mark and new algorithm minimize misalignment due to asymmetric formation of a material layer over the alignment mark.

Abstract translation: 使用新颖的三角对准标记和新颖的算法来在对准和暴露工具中在衬底台上提供衬底的改进的全局对准。 该方法提供了一种改进的计量学，用于对准具有材料层（例如绝缘，多晶硅和导电层）的衬底中的凹陷对准标记，其通过诸如化学/机械抛光的处理无意中制成不对称。 该方法还采用一种算法来检测三角形的凹陷边缘，并且数学上产生三条线表示三角形的边缘。 然后，该算法生成从三角形对准标记的边缘向内移动并且平行于边缘的线的族，直到线收敛到确定三角形对准标记的对准中心的公共点。 该算法使用对准中心的坐标来将衬底定位在曝光工具中，用于粗略对准用于暴露衬底上的光致抗蚀剂层的光掩模。 这种新的对准标记和新算法由于对准标记上的材料层的不对称形成而使未对准最小化。

公开(公告)号：US08762900B2

公开(公告)日：2014-06-24

申请号：US13534765

申请日：2012-06-27

Applicant: Jaw-Jung Shin ,  Shy-Jay Lin ,  Hua-Tai Lin ,  Burn Jeng Lin

Inventor： Jaw-Jung Shin ,  Shy-Jay Lin ,  Hua-Tai Lin ,  Burn Jeng Lin

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G03F1/36 ,  G03F1/70

Abstract: A method of an integrated circuit (IC) design includes receiving an IC design layout. The IC design layout includes an IC feature with a first outer boundary and a first target points assigned to the first outer boundary. The method also includes generating a second outer boundary for the IC feature and moving all the first target points to the second outer boundary to form a modified IC design layout.

Abstract translation: 集成电路（IC）设计的方法包括接收IC设计布局。 IC设计布局包括具有第一外边界的IC特征和分配给第一外边界的第一目标点。 该方法还包括为IC特征产生第二外部边界并将所有第一目标点移动到第二外部边界以形成修改的IC设计布局。

公开(公告)号：US08692351B2

公开(公告)日：2014-04-08

申请号：US12753272

申请日：2010-04-02

Applicant: Cheng Cheng Kuo ,  Luke Lo ,  Minghsing Tsai ,  Ken-Yu Chang ,  Jye-Yen Cheng ,  Jeng-Shiun Ho ,  Hua-Tai Lin ,  Chih-Hsiang Yao

Inventor： Cheng Cheng Kuo ,  Luke Lo ,  Minghsing Tsai ,  Ken-Yu Chang ,  Jye-Yen Cheng ,  Jeng-Shiun Ho ,  Hua-Tai Lin ,  Chih-Hsiang Yao

IPC: H01L21/70

CPC classification number: H01L21/76838 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5077 ,  H01L23/522 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor integrated circuit line structures for improving a process window in the vicinity of dense-to-isolated pattern transition areas and a technique to implement the line structures in the layout process are described in this disclosure. The disclosed structure includes a semiconductor substrate, and a material layer above the substrate. The material layer has a closely spaced dense line structure, an isolated line structure next to the dense line structure, and a dummy line shoulder structure formed in the vicinity of the dense line and the isolated line structures. One end of the dummy line shoulder structure connects to the isolated line structure and another end extends away from the isolated line structure in an orientation substantially perpendicular to the isolated line structure.

Abstract translation: 在本公开中描述了用于改善密集到隔离图案转移区域附近的处理窗口的半导体集成电路线结构和在布局处理中实现线结构的技术。 所公开的结构包括半导体衬底和衬底上方的材料层。 材料层具有紧密间隔的密集线结构，紧密密集线结构旁边的隔离线结构，以及形成在密集线附近和隔离线结构处的虚拟线肩结构。 虚拟线肩结构的一端连接到隔离线结构，另一端以基本垂直于隔离线结构的方向远离隔离线结构延伸。

公开(公告)号：US20140007023A1

公开(公告)日：2014-01-02

申请号：US13534765

申请日：2012-06-27

Applicant: Jaw-Jung Shin ,  Shy-Jay Lin ,  Hua-Tai Lin ,  Burn Jeng Lin

Inventor： Jaw-Jung Shin ,  Shy-Jay Lin ,  Hua-Tai Lin ,  Burn Jeng Lin

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G03F1/36 ,  G03F1/70

Abstract: A method of an integrated circuit (IC) design includes receiving an IC design layout. The IC design layout includes an IC feature with a first outer boundary and a first target points assigned to the first outer boundary. The method also includes generating a second outer boundary for the IC feature and moving all the first target points to the second outer boundary to form a modified IC design layout.

Abstract translation: 集成电路（IC）设计的方法包括接收IC设计布局。 IC设计布局包括具有第一外边界的IC特征和分配给第一外边界的第一目标点。 该方法还包括为IC特征产生第二外部边界并将所有第一目标点移动到第二外部边界以形成修改的IC设计布局。

公开(公告)号：US08580637B2

公开(公告)日：2013-11-12

申请号：US13328419

申请日：2011-12-16

Applicant: Jhun Hua Chen ,  Yu-Lung Tung ,  Chi-Tien Chen ,  Hua-Tai Lin ,  Hsiang-Lin Chen ,  Hung Chang Hsieh ,  Yi-Fan Chen

Inventor： Jhun Hua Chen ,  Yu-Lung Tung ,  Chi-Tien Chen ,  Hua-Tai Lin ,  Hsiang-Lin Chen ,  Hung Chang Hsieh ,  Yi-Fan Chen

IPC: H01L21/8242

CPC classification number: H01L23/528 ,  H01L21/31144 ,  H01L21/76897 ,  H01L21/8238 ,  H01L21/823871 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A pattern on a semiconductor substrate is formed using two separate etching processes. The first etching process removes a portion of an intermediate layer above an active region of the substrate. The second etching process exposes a portion of the active region of the substrate. A semiconductor device formed using the patterning method has a decreased mask error enhancement factor and increased critical dimension uniformity than the prior art.

Abstract translation: 使用两个单独的蚀刻工艺形成半导体衬底上的图案。 第一蚀刻工艺除去衬底的有源区上方的中间层的一部分。 第二蚀刻工艺暴露了衬底的一部分有源区。 使用图案化方法形成的半导体器件具有比现有技术更低的掩模误差增强因子和增加的临界尺寸均匀性。

公开(公告)号：US08507177B2

公开(公告)日：2013-08-13

申请号：US13050305

申请日：2011-03-17

Applicant: Hsien-Cheng Wang ,  Chin-Hsiang Lin ,  Heng-Jen Lee ,  Ching-Yu Chang ,  Hua-Tai Lin ,  Burn Jeng Lin

Inventor： Hsien-Cheng Wang ,  Chin-Hsiang Lin ,  Heng-Jen Lee ,  Ching-Yu Chang ,  Hua-Tai Lin ,  Burn Jeng Lin

IPC: G03F7/004 ,  G03F7/30 ,  G03F7/039

CPC classification number: G03F7/0397 ,  G03F7/0045 ,  G03F7/0392 ,  G03F7/30 ,  G03F7/38 ,  G03F7/70858 ,  Y10S430/106 ,  Y10S430/111

Abstract: A material for use in lithography processing includes a polymer that turns soluble to a base solution in response to reaction with acid and a plurality of magnetically amplified generators (MAGs) each having a magnetic element and each decomposing to form acid bonded with the magnetic element in response to radiation energy.

Abstract translation: 用于光刻处理的材料包括响应于与酸的反应而变成可溶于碱溶液的聚合物和多个具有磁性元素的磁放大发生器（MAG），并分别与磁性元件形成酸结合 响应辐射能量。