公开(公告)号：US20130314062A1

公开(公告)日：2013-11-28

申请号：US13953317

申请日：2013-07-29

Applicant: Wolfson Microelectronics plc

Inventor： Andrew Notman ,  Mark McCloy-Stevens ,  Dauglas James Wallace MacFarlane ,  Holger Haiplik

IPC: G05F1/46

CPC classification number: H02M3/1588 ,  H02M1/38 ,  H02M2001/0009 ,  H02M2001/0032 ,  Y02B70/1466

Abstract: Methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter is operable so that a low side supply switch may be turned off, before the high side supply switch is turned on. During the period when both switches are off the current loop control remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.

Abstract translation: 用于控制DC-DC转换器的方法和装置，特别是在谷电流模式下。 在高侧供电开关接通之前，DC-DC转换器可操作使得可以关闭低侧供电开关。 在两个开关断开期间，电流环路控制保持有效，并且仿真电感（L）电流的变化。 一个实施例使用电流传感器进行无损耗电流检测，并通过在低侧开关断开时保持电流传感器（ISNS）的输出值并添加仿真斜坡信号（VISLP）来模拟电感器电流的变化， 直到电感电流达到零。 还公开了采用基于最小导通时间的脉冲跳过操作模式的实施例。 本发明实现了从连续导通模式不连续导通模式和脉冲跳跃的无缝转换，并提供了在低电流负载下有效的转换器。

公开(公告)号：US09306448B2

公开(公告)日：2016-04-05

申请号：US14174553

申请日：2014-02-06

Applicant: Wolfson Microelectronics plc

Inventor： John P. Lesso ,  John L. Pennock ,  Peter J. Frith

IPC: H03F99/00 ,  H02M3/07 ,  H03F1/02 ,  H03F3/187 ,  H03F3/68 ,  H03F3/185 ,  H03G1/00

CPC classification number: H02M3/07 ,  H03F1/025 ,  H03F3/185 ,  H03F3/187 ,  H03F3/68 ,  H03F2200/507 ,  H03F2200/511 ,  H03G1/0017 ,  H03G1/0029 ,  H03G1/0088 ,  H03G1/0094

Abstract: A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.

公开(公告)号：US09154868B2

公开(公告)日：2015-10-06

申请号：US13773276

申请日：2013-02-21

Applicant: Wolfson Microelectronics plc

Inventor： Renjish Kodappully Narayan ,  Steven Llewellyn

IPC: A61F11/06 ,  G10K11/16 ,  H03B29/00 ,  H04R1/10 ,  H04R3/00 ,  H04R5/04

CPC classification number: H04R1/1083 ,  H04R1/1016 ,  H04R3/005 ,  H04R3/007 ,  H04R5/04 ,  H04R2410/05 ,  H04R2430/01

Abstract: An earphone comprises an earphone body, containing a speaker, and a projection, extending from a first surface of the earphone body, for location in the entrance to the user's ear canal. The earphone body comprises a sound outlet in the first surface, for allowing sounds generated by the speaker to leave the earphone body. The projection extends from the first surface of the earphone body, adjacent to the sound outlet, and contains a sound inlet port, connected to a microphone for detecting sounds entering the ear canal. A noise cancellation system includes noise cancellation circuitry, for applying a frequency dependent filter characteristic and applying a gain to an input signal representing ambient noise, at least one of the frequency dependent filter characteristic and the gain being adaptive. The earphone then has an ambient noise microphone, and an error microphone connected to the sound inlet port.

Abstract translation: 耳机包括耳机体，其包含扬声器和从耳机主体的第一表面延伸的用于位于使用者耳道入口处的突出部。 耳机主体包括在第一表面中的声音出口，用于允许扬声器产生的声音离开耳机主体。 突出部从耳机本体的第一表面延伸出来，邻近声音出口，并且包含连接到麦克风的声音入口端口，用于检测进入耳道的声音。 噪声消除系统包括噪声消除电路，用于施加频率相关滤波器特性，并对表示环境噪声的输入信号应用增益，频率相关滤波器特性和增益中的至少一个是自适应的。 然后耳机具有环境噪声麦克风，以及连接到声音入口的错误麦克风。

公开(公告)号：US20150109056A1

公开(公告)日：2015-04-23

申请号：US14521191

申请日：2014-10-22

Applicant: Wolfson Microelectronics plc

Inventor： John Paul Lesso ,  Toru Ido

IPC: H03F3/217 ,  H03F1/02

CPC classification number: H03F3/2171 ,  H03F1/0211 ,  H03F3/187 ,  H03F3/217 ,  H03F2200/165 ,  H03F2200/171 ,  H03F2200/333 ,  H03F2200/351 ,  H03G1/0088

Abstract: Methods and apparatus for Class-D amplifier circuits with improved power efficiency. The circuit has an output stage with at least first and second switches and a modulator that receives an input signal to be amplified, SIN, and a first clock signal fSW. The modulator controls the duty cycles of the first and second switches, within a switching cycle based on the input signal, wherein the switching cycle has a switching frequency based on the first clock signal. A frequency controller controls the frequency of the first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second, lower, input signal amplitude. A lower switching frequency can be tolerated at low signal amplitudes and varying the switching frequency in this way thus maintains stability whilst reducing switching power losses.

Abstract translation: 具有提高功率效率的D类放大器电路的方法和装置。 电路具有至少具有第一和第二开关的输出级和接收要被放大的输入信号SIN和第一时钟信号fSW的调制器。 调制器基于输入信号在开关周期内控制第一和第二开关的占空比，其中开关周期具有基于第一时钟信号的开关频率。 频率控制器响应于输入信号的幅度的指示来控制第一时钟信号的频率，以便提供第一输入信号幅度的第一开关频率和在第二输入信号幅度下的第二，较低开关频率 ，输入信号幅度。 在低信号幅度下可以容忍较低的开关频率，并且以这种方式改变开关频率，从而在降低开关功率损耗的同时保持稳定性。

公开(公告)号：US08988149B2

公开(公告)日：2015-03-24

申请号：US13942303

申请日：2013-07-15

Applicant: Wolfson Microelectronics plc

Inventor： John Paul Lesso

IPC: H03F3/04 ,  H03F1/02 ,  H03F1/30 ,  H03F3/185 ,  H03F3/193 ,  H03G3/00

CPC classification number: H03G3/3015 ,  H03F1/0216 ,  H03F1/0227 ,  H03F1/0261 ,  H03F1/30 ,  H03F3/185 ,  H03F3/193 ,  H03F2200/03 ,  H03F2200/504 ,  H03G3/001

Abstract: An amplifier circuit, comprising: an input, for receiving an input signal to be amplified; a power amplifier, for amplifying the input signal; a switched power supply, having a switching frequency, for providing at least one supply voltage to the power amplifier; and a dither block, for dithering the switching frequency of the switched power supply. The dither block is controlled based on the input signal. Another aspect of the invention involves using first and second switches, each having different capacitances and resistances, and using the first or second switch depending on the input signal or volume signal. Another aspect of the invention involves controlling a bias signal provided to one or more components in the signal path based on the input signal or volume signal.

Abstract translation: 一种放大器电路，包括：输入端，用于接收待放大的输入信号; 功率放大器，用于放大输入信号; 具有开关频率的开关电源，用于向所述功率放大器提供至少一个电源电压; 以及抖动块，用于使开关电源的开关频率抖动。 基于输入信号控制抖动块。 本发明的另一方面涉及使用具有不同电容和电阻的第一和第二开关，以及根据输入信号或音量信号使用第一或第二开关。 本发明的另一方面涉及基于输入信号或音量信号控制提供给信号路径中的一个或多个分量的偏置信号。

公开(公告)号：US20150071466A1

公开(公告)日：2015-03-12

申请号：US14448848

申请日：2014-07-31

Applicant: Wolfson Microelectronics plc

Inventor： Jean Pierre Lasseuguette ,  James Deas

IPC: H03F3/183 ,  H04R23/00 ,  H03F3/45

CPC classification number: H03F3/183 ,  H03F1/0266 ,  H03F1/3205 ,  H03F1/3211 ,  H03F3/185 ,  H03F3/187 ,  H03F3/45071 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/45197 ,  H03F3/45654 ,  H03F2200/03 ,  H03F2200/78 ,  H03F2203/45112 ,  H03F2203/45244 ,  H03F2203/45392 ,  H03F2203/45396 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45498 ,  H03F2203/45658 ,  H04R3/00 ,  H04R19/005 ,  H04R19/04 ,  H04R23/00 ,  H04R2201/003

Abstract: Amplifier arrangements for read-out of MEMS capacitive transducers, such as low-noise amplifiers. An amplifier circuit has first and second MOS transistors, with the gate of the first transistor driven by the input signal, and the gate of the second transistor driven by a reference. The sources of the first and second transistors are connected via an impedance. Modulation circuitry is arranged to monitor a signal with a value that varies with the input signal and to modulate the back-bias voltage between the bulk and source terminals of the first and second transistors with the applied modulation being equal for each transistor and based on said monitored signal. The back-bias of the first transistor can be increase to extend the input range of the transistor in situations where the input signal may otherwise result in signal clipping, while avoiding noise and power issues for other input signal levels. By applying an equal modulation to the back-bias of each transistor, there is no substantial modulation of the output signal.

Abstract translation: 用于读取MEMS电容式换能器（如低噪声放大器）的放大器装置。 放大器电路具有第一和第二MOS晶体管，第一晶体管的栅极由输入信号驱动，第二晶体管的栅极由参考电压驱动。 第一和第二晶体管的源极通过阻抗连接。 调制电路被布置为以具有随输入信号变化的值来监测信号，并且调制第一和第二晶体管的体源极和源极端之间的反向偏置电压，并且对于每个晶体管，施加的调制相等，并且基于所述 监控信号。 在输入信号可能导致信号削波的情况下，可以增加第一晶体管的反偏压以延长晶体管的输入范围，同时避免其他输入信号电平的噪声和功率问题。 通过对每个晶体管的反向偏置施加相等的调制，对输出信号没有实质的调制。

公开(公告)号：US08957731B2

公开(公告)日：2015-02-17

申请号：US13677182

申请日：2012-11-14

Applicant: Wolfson Microelectronics plc

Inventor： John Paul Lesso

IPC: H03F3/217

Abstract: Methods and apparatus for Class-D amplifier circuits with D.C. offset control/correction. A Class-D amplifier is described having an output stage, such as a full H-bridge or half bridge, with a plurality of switches operable to provide a plurality of output states comprising at least a positive output state and a negative output state. Control circuitry is configured to receive a first signal based on the input signal and produce a digital control signal, which is used to determine the switch state of the output stage. A digital integrator is configured to receive a feedback signal indicative of the output state of the output stage and to sample the feedback signal at a sample rate and produce an integrated output signal (INT, IVC) indicating the difference in number of instances of the positive output state and the negative output state. Correction circuitry subtracts the integrated output signal from the input signal to produce a D.C. offset corrected signal.

公开(公告)号：US20140341402A1

公开(公告)日：2014-11-20

申请号：US14452067

申请日：2014-08-05

Applicant: Wolfson Microelectronics plc

Inventor： Anthony Bernard Traynor ,  Richard Ian Laming ,  Tsjerk H. Hoekstra

IPC: H04R23/00 ,  B81B3/00

CPC classification number: H04R19/04 ,  B81B3/0021 ,  B81B3/0072 ,  B81B3/0094 ,  B81B2201/00 ,  B81B2201/0235 ,  B81B2201/0257 ,  B81B2201/0264 ,  H01L27/00 ,  H04R19/00 ,  H04R19/005 ,  H04R23/00 ,  H04R31/00 ,  H04R2499/11

Abstract: A method of fabricating a micro-electrical-mechanical system (MEMS) transducer comprises the steps of forming a membrane on a substrate, and forming a back-volume in the substrate. The step of forming a back-volume in the substrate comprises the steps of forming a first back-volume portion and a second back-volume portion, the first back-volume portion being separated from the second back-volume portion by a step in a sidewall of the back-volume. The cross-sectional area of the second back-volume portion can be made greater than the cross-sectional area of the membrane, thereby enabling the back-volume to be increased without being constrained by the cross-sectional area of the membrane. The back-volume may comprise a third back-volume portion. The third back-volume portion enables the effective diameter of the membrane to be formed more accurately.

Abstract translation: 制造微机电系统（MEMS）换能器的方法包括以下步骤：在衬底上形成膜，并在衬底中形成后体积。 在基板中形成后部体积的步骤包括以下步骤：形成第一后部体积部分和第二背部体积部分，第一后部体积部分与第二背部体积部分分离， 背部体积的侧壁。 第二后部容积部分的横截面面积可以大于膜的横截面面积，从而能够增加后部体积，而不受膜的横截面面积的约束。 背部容积可以包括第三后部体积部分。 第三后部体积部分能够更准确地形成膜的有效直径。

公开(公告)号：US08742970B2

公开(公告)日：2014-06-03

申请号：US13902638

申请日：2013-05-24

Applicant: Wolfson Microelectronics plc

Inventor： John Paul Lesso ,  John Laurence Pennock

IPC: H03M1/60 ,  H03M1/00 ,  H03M1/12

CPC classification number: H03M1/00 ,  H03M1/1014 ,  H03M1/12 ,  H03M1/1225 ,  H03M1/186 ,  H03M1/34 ,  H03M1/60 ,  H03M2201/4233

Abstract: An apparatus and method for regulating analogue-to-digital converters. First and second input signals are received at controlled oscillator circuitry which generates respective first and second pulse streams with pulse rates based on the relevant input signal. Difference circuitry determines the difference in number of pulses of the first and second pulse streams and outputs a first digital signal. Circuitry also determines a signal independent value based on the number of pulses of the first and/or second pulse streams. In one embodiment this value is the sum or average of the number of pulses of the first and second pulse streams. This value can be used to calibrate for any variation in transfer characteristic of the oscillator circuitry. In one embodiment this value is compared to a reference value and a regulation signal passed to control circuitry to regulate the operation of the oscillation circuitry.

Abstract translation: 一种用于调节模数转换器的装置和方法。 在受控振荡器电路处接收第一和第二输入信号，该电路产生具有基于相关输入信号的脉冲速率的相应的第一和第二脉冲流。 差分电路确定第一和第二脉冲流的脉冲数的差异并输出第一数字信号。 电路还基于第一和/或第二脉冲流的脉冲数来确定与信号无关的值。 在一个实施例中，该值是第一和第二脉冲流的脉冲数的和或平均值。 该值可用于校准振荡器电路的传输特性的任何变化。 在一个实施例中，该值与参考值和传递给控制电路的调节信号进行比较以调节振荡电路的操作。

公开(公告)号：US20140112500A1

公开(公告)日：2014-04-24

申请号：US14142276

申请日：2013-12-27

Applicant: Wolfson Microelectronics plc

Inventor： John Paul Lesso

IPC: H03F3/181 ,  H03K3/013

CPC classification number: H03F3/181 ,  H03F1/304 ,  H03F3/183 ,  H03F2200/03 ,  H03K3/013

Abstract: An apparatus and method for DC offset compensation. An amplifier receives an input signal (AIN) and provides an amplified output signal (SOUT) and a feedback path provides DC offset compensation. The feedback path comprises at least one voltage controlled oscillator (VCO) and a counter. The VCO provides, over time, a first VCO output signal based on said amplified output signal and a second VCO output signal based on a reference signal (VREF). The counter generates first pulse counts based upon the first VCO output signal and second pulse counts based upon the second VCO output signal and provides a compensation signal based on a comparison of the first and second pulse counts. One voltage controlled oscillator may sequentially receive a signal based on said amplifier output signal and the reference signal from a multiplexer so as to sequentially produce the first and second VCO output signals.

Abstract translation: 一种用于直流偏移补偿的装置和方法。 放大器接收输入信号（AIN）并提供放大的输出信号（SOUT），反馈路径提供DC偏移补偿。 反馈路径包括至少一个压控振荡器（VCO）和计数器。 VCO随时间提供基于所述放大的输出信号的第一VCO输出信号和基于参考信号（VREF）的第二VCO输出信号。 计数器基于第一VCO输出信号和基于第二VCO输出信号的第二脉冲计数产生第一脉冲计数，并且基于第一和第二脉冲计数的比较来提供补偿信号。 一个压控振荡器可以基于所述放大器输出信号和来自多路复用器的参考信号顺序地接收信号，以便顺序产生第一和第二VCO输出信号。