公开(公告)号：US20210350219A1

公开(公告)日：2021-11-11

申请号：US17380318

申请日：2021-07-20

Applicant: Applied Materials, Inc.

Inventor： Milan Pesic ,  Shruba Gangopadhyay ,  Muthukumar Kaliappan ,  Michael Haverty

IPC: G06N3/063 ,  G11C11/54 ,  H01L27/24 ,  H01L45/00 ,  G11C13/00

Abstract: A crested barrier memory device may include a first electrode, a first self- rectifying layer, and a combined barrier and active layer. The first self-rectifying layer may be between the first electrode and the active layer. A conduction band offset between the first self-rectifying layer and the combined barrier and active layer may be greater than approximately 1.5 eV. A valence band offset between the first self-rectifying layer and the combined barrier and active layer may be less than approximately −0.5 eV. The device may also include a second electrode. The active layer may be between the first self-rectifying layer and the second electrode.