公开(公告)号：US20120267751A1

公开(公告)日：2012-10-25

申请号：US13091800

申请日：2011-04-21

Applicant: Belgacem Haba ,  Ilyas Mohammed

Inventor： Belgacem Haba ,  Ilyas Mohammed

IPC: H01L23/482 ,  H01L27/02 ,  H01L21/28

CPC classification number: H01L21/486 ,  H01L23/49827 ,  H01L23/49861 ,  H01L23/49894 ,  H01L2224/16225 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K3/4046 ,  H05K2201/0979 ,  H05K2201/10378 ,  H05K2201/10674

Abstract: A method for making an interconnection component is disclosed, including forming a plurality of metal posts extending away from a reference surface. Each post is formed having a pair of opposed end surface and an edge surface extending therebetween. A dielectric layer is formed contacting the edge surfaces and filling spaces between adjacent ones of the posts. The dielectric layer has first and second opposed surfaces adjacent the first and second end surfaces. The dielectric layer has a coefficient of thermal expansion of less than 8 ppm/° C. The interconnection component is completed such that it has no interconnects between the first and second end surfaces of the posts that extend in a lateral direction. First and second pluralities of wettable contacts are adjacent the first and second opposed surfaces. The wettable contacts are usable to bond the interconnection component to a microelectronic element or a circuit panel.

Abstract translation: 公开了一种用于制造互连部件的方法，包括形成远离参考表面延伸的多个金属柱。 每个柱形成具有一对相对的端面和在它们之间延伸的边缘表面。 形成接触边缘表面和相邻柱之间的填充空间的电介质层。 电介质层具有邻近第一和第二端面的第一和第二相对表面。 电介质层的热膨胀系数小于8ppm /℃。互连部件完成，使得它们在横向方向上延伸的柱的第一和第二端面之间没有互连。 第一和第二多个可湿接触部分邻近第一和第二相对表面。 可湿接触可用于将互连部件连接到微电子元件或电路板。

公开(公告)号：US20120155055A1

公开(公告)日：2012-06-21

申请号：US13157722

申请日：2011-06-10

Applicant: Teck-Gyu Kang ,  Wei-Shun Wang ,  Hiroaki Sato ,  Kiyoaki Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

Inventor： Teck-Gyu Kang ,  Wei-Shun Wang ,  Hiroaki Sato ,  Kiyoaki Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

IPC: H05K7/00 ,  H05K3/36 ,  H05K3/32

CPC classification number: H01L24/81 ,  B23K1/0016 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L2224/13016 ,  H01L2224/13017 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/133 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/8138 ,  H01L2224/81801 ,  H01L2224/8185 ,  H01L2224/831 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/351 ,  H05K1/113 ,  H05K3/341 ,  H05K3/4007 ,  H05K2201/0195 ,  Y10T29/49126 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A microelectronic assembly may include a substrate including a rigid dielectric layer having electrically conductive elements, a microelectronic element having a plurality of contacts exposed at a face thereof, and conductive vias extending through a compliant dielectric layer overlying the rigid dielectric layer. The vias electrically connect the substrate contacts respectively to the conductive elements, and the substrate contacts are joined respectively to the contacts of the microelectronic element. The vias, compliant layer and substrate contacts are adapted to appreciably relieve stress at the substrate contacts associated with differential thermal contact and expansion of the assembly.

Abstract translation: 微电子组件可以包括包括具有导电元件的刚性介电层的基板，具有在其表面暴露的多个触点的微电子元件以及延伸穿过刚性介电层上的柔性介电层的导电通孔。 通孔将基板触点分别电连接到导电元件，并且基板触点分别连接到微电子元件的触点。 通孔，柔性层和衬底触点适于明显地减轻与组件的差分热接触和膨胀相关联的衬底触点处的应力。

公开(公告)号：US20120152433A1

公开(公告)日：2012-06-21

申请号：US12974611

申请日：2010-12-21

Applicant: Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

IPC: B32B37/06

CPC classification number: H01L22/12 ,  H01L21/67092

Abstract: A method of bonding a first substrate and a second substrate includes the steps of rotating first substrate with an adhesive mass thereon, and second substrate contacting the mass and overlying the first substrate, controlling a vertical height of a heated control platen spaced apart from and not contacting the second substrate so as to control a temperature of the adhesive mass, so as to at least one of bond the first and second substrates in alignment with one another, or achieve a sufficiently planar adhesive interface between the first and second substrates.

Abstract translation: 接合第一基板和第二基板的方法包括以下步骤：使第一基板与其上的粘合剂质量物质旋转，第二基板接触物料并覆盖第一基板，控制加热的控制台板的垂直高度， 使所述第二基板接触以控制所述粘合剂物料的温度，以便使所述第一和第二基板彼此对准的至少一个接合，或在所述第一和第二基板之间实现足够平坦的粘合界面。

公开(公告)号：US20120146206A1

公开(公告)日：2012-06-14

申请号：US12966225

申请日：2010-12-13

Applicant: Belgacem Haba ,  Ilyas Mohammed

Inventor： Belgacem Haba ,  Ilyas Mohammed

IPC: H01L23/52 ,  H01L21/50 ,  H01L23/532

CPC classification number: H01L24/81 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/5389 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/11003 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/811 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package includes a substrate having a first region, a second region, a first surface, and a second surface remote from the first surface. At least one microelectronic element overlies the first region on the first surface. First electrically conductive elements are exposed at one of the first surface and the second surface of the substrate within the second region with at least some of the first conductive elements electrically connected to the at least one microelectronic element. Substantially rigid metal elements overlie the first conductive elements and have end surfaces remote therefrom. A bond metal joins the metal elements with the first conductive elements, and a molded dielectric layer overlies at least the second region of the substrate and has a surface remote from the substrate. The end surfaces of the metal elements are at least partially exposed at the surface of the molded dielectric layer.

Abstract translation: 微电子封装包括具有第一区域，第二区域，第一表面和远离第一表面的第二表面的衬底。 至少一个微电子元件覆盖在第一表面上的第一区域上。 第一导电元件在第二区域内的衬底的第一表面和第二表面中的一个处暴露，其中至少一些第一导电元件电连接到至少一个微电子元件。 基本上刚性的金属元件覆盖在第一导电元件上并具有远离其的端表面。 键合金属将金属元件与第一导电元件结合，并且模制的电介质层至少覆盖在衬底的第二区域上并且具有远离衬底的表面。 金属元件的端面至少部分地暴露在模制介电层的表面。

公开(公告)号：US20120068352A1

公开(公告)日：2012-03-22

申请号：US12883431

申请日：2010-09-16

Applicant: Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48 ,  H01L21/50

CPC classification number: H01L25/0657 ,  H01L21/76805 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/24 ,  H01L24/32 ,  H01L24/82 ,  H01L24/92 ,  H01L25/50 ,  H01L27/14601 ,  H01L27/14632 ,  H01L2224/0346 ,  H01L2224/05009 ,  H01L2224/05647 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/82005 ,  H01L2224/82101 ,  H01L2224/9202 ,  H01L2224/92144 ,  H01L2224/94 ,  H01L2225/06544 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2224/82 ,  H01L2924/00

Abstract: An assembly and method of making same are provided. The assembly can be formed by stacking a first semiconductor element atop a second semiconductor element and forming an electrically conductive element extending through openings of the semiconductor elements. The openings may be staged. The conductive element can conform to contours of the interior surfaces of the openings and can electrically connect conductive pads of the semiconductor elements. A dielectric region can be provided at least substantially filling the openings of the semiconductor elements, and the electrically conductive element can extend through an opening formed in the dielectric region.

Abstract translation: 提供了组装和制造方法。 可以通过在第二半导体元件顶部堆叠第一半导体元件并形成延伸穿过半导体元件的开口的导电元件来形成该组件。 开口可以分段。 导电元件可以符合开口的内表面的轮廓并且可以电连接半导体元件的导电焊盘。 可以提供至少基本上填充半导体元件的开口的电介质区域，并且导电元件可以延伸穿过形成在电介质区域中的开口。

公开(公告)号：US07534652B2

公开(公告)日：2009-05-19

申请号：US11318846

申请日：2005-12-27

Applicant: Belgacem Haba ,  Ilyas Mohammed ,  Craig S. Mitchell ,  Michael Warner ,  Jesse Burl Thompson

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Craig S. Mitchell ,  Michael Warner ,  Jesse Burl Thompson

IPC: H01L21/44

CPC classification number: H01L21/6835 ,  H01L22/34 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/056 ,  H01L2224/11003 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/1601 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05099

Abstract: A dielectric structure is formed by a molding process, so that a first surface of a dielectric structure is shaped by contact with the mold. The opposite second surface of the dielectric structure is applied onto the front surface of a wafer element. The dielectric layer may include protruding bumps and terminals may be formed on the bumps. The bumps may be of a precise height. The terminals lie at a precisely controlled height above the front surface of the wafer element. The terminals may include projecting posts which extend above a surrounding solder mask layer to facilitate engagement with a test fixture. The posts are immersed within solder joints when the structure is bonded to a circuit panel.

Abstract translation: 通过模制工艺形成电介质结构，使得电介质结构的第一表面通过与模具接触而成形。 电介质结构的相对的第二表面被施加到晶片元件的前表面上。 电介质层可以包括突出的凸起，并且可以在凸块上形成端子。 凸块可能具有精确的高度。 端子位于晶片元件的前表面上方的精确控制的高度。 端子可以包括在周围的焊接掩模层上方延伸的突出柱，以便于与测试夹具的接合。 当结构结合到电路板上时，将柱浸入焊点中。

公开(公告)号：US20090039528A1

公开(公告)日：2009-02-12

申请号：US12221924

申请日：2008-08-07

Applicant: Belgacem Haba ,  Ilyas Mohammed

Inventor： Belgacem Haba ,  Ilyas Mohammed

IPC: H01L23/52 ,  H01L21/00

CPC classification number: H01L25/105 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/544 ,  H01L24/24 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/82 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68377 ,  H01L2223/54426 ,  H01L2224/16 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/1029 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10157 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method is provided for fabricating a stacked microelectronic assembly by steps including stacking and joining first and second like microelectronic substrates, each including a plurality of like microelectronic elements attached together at dicing lanes. Each microelectronic element has boundaries defined by edges including a first edge and a second edge. The first and second microelectronic substrates can be joined in different orientations, such that first edges of microelectronic elements of the first microelectronic substrate are aligned with second edges of microelectronic elements of the second microelectronic substrate. After exposing traces at the first and second edges of the microelectronic elements of the stacked microelectronic substrates, first and second leads can be formed which are connected to the exposed traces of the first and second microelectronic substrates, respectively. The second leads can be electrically isolated from the first leads.

Abstract translation: 提供了一种用于通过以下步骤制造堆叠的微电子组件的方法，包括堆叠和​​接合第一和第二类似的微电子衬底，每个微电子衬底包括在切割通道处附接在一起的多个类似的微电子元件。 每个微电子元件具有由包括第一边缘和第二边缘的边缘限定的边界。 第一和第二微电子衬底可以以不同的取向接合，使得第一微电子衬底的微电子元件的第一边缘与第二微电子衬底的微电子元件的第二边缘对准。 在堆叠的微电子衬底的微电子元件的第一和第二边缘上暴露迹线之后，可以形成分别连接到第一和第二微电子衬底的暴露痕迹的第一和第二引线。 第二引线可以与第一引线电隔离。

公开(公告)号：US07453157B2

公开(公告)日：2008-11-18

申请号：US11140312

申请日：2005-05-27

Applicant: Belgacem Haba ,  Masud Beroz ,  Teck-Gyu Kang ,  Yoichi Kubota ,  Sridhar Krishnan ,  John B. Riley, III ,  Ilyas Mohammed

Inventor： Belgacem Haba ,  Masud Beroz ,  Teck-Gyu Kang ,  Yoichi Kubota ,  Sridhar Krishnan ,  John B. Riley, III ,  Ilyas Mohammed

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC classification number: H01L23/49811 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4985 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package includes a microelectronic element having faces, contacts and an outer perimeter, and a flexible substrate overlying and spaced from a first face of the microelectronic element, an outer region of the flexible substrate extending beyond the outer perimeter of the microelectronic element. The package includes a plurality of etched conductive posts exposed at a surface of the flexible substrate and being electrically interconnected with the microelectronic element, wherein at least one of the conductive posts is disposed in the outer region of the flexible substrate, and a compliant layer disposed between the first face of the microelectronic element and the flexible substrate, wherein the compliant layer overlies the at least one of the conductive posts that is disposed in the outer region of the flexible substrate. The package includes an encapsulating mold material in contact with the microelectronic element and the compliant layer, whereby the encapsulating mold material overlies the outer region of the flexible substrate.

Abstract translation: 微电子封装包括具有面，触点和外周边的微电子元件，以及覆盖并与微电子元件的第一面间隔开的柔性基板，柔性基板的外部区域延伸超出微电子元件的外周边。 所述封装包括多个蚀刻的导电柱，其暴露在所述柔性基板的表面处并与所述微电子元件电互连，其中所述导电柱中的至少一个设置在所述柔性基板的外部区域中，并且设置柔性层 在微电子元件的第一面和柔性基板之间，其中柔性层覆盖设置在柔性基板的外部区域中的至少一个导电柱。 该封装包括与微电子元件和柔性层接触的封装模具材料，由此封装模具材料覆盖在柔性基板的外部区域上。

公开(公告)号：US07176043B2

公开(公告)日：2007-02-13

申请号：US11014439

申请日：2004-12-16

Applicant: Belgacem Haba ,  Masud Beroz ,  Ronald Green ,  Ilyas Mohammed ,  Stuart E. Wilson ,  Wael Zohni ,  Yoichi Kubota ,  Jesse Burl Thompson

Inventor： Belgacem Haba ,  Masud Beroz ,  Ronald Green ,  Ilyas Mohammed ,  Stuart E. Wilson ,  Wael Zohni ,  Yoichi Kubota ,  Jesse Burl Thompson

IPC: H01L21/66

CPC classification number: H01L23/49811 ,  G01R1/06744 ,  G01R1/0735 ,  H01L21/563 ,  H01L23/4985 ,  H01L24/12 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13187 ,  H01L2224/13188 ,  H01L2224/1319 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/17 ,  H01L2224/1703 ,  H01L2224/48091 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/83194 ,  H01L2224/85399 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2224/13099 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A microelectronic package includes a microelectronic element having faces and contacts and a flexible substrate spaced from and overlying a first face of the microelectronic element. The package also includes a plurality of conductive posts extending from the flexible substrate and projecting away from the first face of the microelectronic element, wherein at least some of the conductive posts are electrically interconnected with the microelectronic element, and a plurality of support elements supporting the flexible substrate over the microelectronic element. The conductive posts are offset from the support elements to facilitate flexure of the substrate and movement of the posts relative to the microelectronic element.

Abstract translation: 微电子封装包括具有面和触点的微电子元件和与微电子元件的第一面间隔开并且覆盖其上的柔性基板。 该封装还包括从柔性基板延伸并从远离微电子元件的第一面突出的多个导电柱，其中至少一些导电柱与微电子元件电互连，以及多个支撑元件 微电子元件上的柔性衬底。 导电柱从支撑元件偏移以便于基板的挠曲和柱相对于微电子元件的移动。

公开(公告)号：US20060033216A1

公开(公告)日：2006-02-16

申请号：US11252305

申请日：2005-10-17

Applicant: L. Pflughaupt ,  David Gibson ,  Young-Gon Kim ,  Craig Mitchell ,  Wael Zohni ,  Ilyas Mohammed

Inventor： L. Pflughaupt ,  David Gibson ,  Young-Gon Kim ,  Craig Mitchell ,  Wael Zohni ,  Ilyas Mohammed

IPC: H01L23/52

CPC classification number: H01L23/528 ,  H01L23/50 ,  H01L23/66 ,  H01L24/10 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/06505 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/14 ,  H01L2224/1403 ,  H01L2224/14505 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/78301 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/023 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2924/00014

Abstract: A stacked chip assembly includes individual units having chips mounted on dielectric layers and traces on the dielectric layers interconnecting the contacts of the chips with terminals disposed in peripheral regions of the dielectric layers. At least some of the traces are multi-branched traces which connect chip select contacts to chip select terminals. The units are stacked one above the other with corresponding terminals of the different units being connected to one another by solder balls or other conductive elements so as to form vertical buses. Prior to stacking, the multi-branched traces of the individual units are selectively connected, as by forming solder bridges, so as to leave chip select contacts of chips in different units connected to different chip select terminals and thereby connect these chips to different vertical buses. The individual units desirably are thin and directly abut one another so as to provide a low-height assembly with good heat transfer from chips within the stack.

Abstract translation: 堆叠式芯片组件包括具有安装在电介质层上的芯片的单独单元和在将芯片的触点与布置在电介质层的周边区域中的端子互连的电介质层上的迹线。 至少一些迹线是将分片选择触点连接到芯片选择端子的多分支迹线。 这些单元彼此堆叠，不同单元的相应端子通过焊球或其它导电元件彼此连接，以形成垂直总线。 在堆叠之前，通过形成焊接桥，各个单元的多分支迹线被选择性地连接，以便在连接到不同的芯片选择端子的不同单元中留下芯片的芯片选择触点，从而将这些芯片连接到不同的垂直总线 。 各个单元期望地是薄的并且直接地彼此邻接，以便提供具有来自堆叠内的芯片的良好热传递的低高度组件。