公开(公告)号：US20240021668A1

公开(公告)日：2024-01-18

申请号：US18335447

申请日：2023-06-15

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU

IPC: H01L29/04 ,  H01L21/02

CPC classification number: H01L29/04 ,  H01L21/02595 ,  H01L21/02609 ,  H01L21/02554 ,  H01L21/02129

Abstract: A semiconductor device includes an oxide semiconductor layer having a polycrystalline structure on an insulating surface, a gate electrode over the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer includes a first region having a first crystal structure overlapping the gate electrode and a second region having a second crystal structure not overlapping the gate electrode. An electrical conductivity of the second region is larger than an electrical conductivity of the first region. The second crystal structure is identical to the first crystal structure.

公开(公告)号：US20230138390A1

公开(公告)日：2023-05-04

申请号：US18148056

申请日：2022-12-29

Applicant: Japan Display Inc.

Inventor： Takanori TSUNASHIMA ,  Masashi TSUBUKU ,  Makoto UCHIDA

IPC: H01L27/146 ,  H01L31/032 ,  H01L31/113

Abstract: According to one embodiment, an optical sensor device includes an insulating substrate, a first conductive layer and an optical sensor element disposed between the insulating substrate and the first conductive layer. The optical sensor element is electrically connected to the first conductive layer and covered by the first conductive layer. The optical sensor element includes a first semiconductor layer formed of an oxide semiconductor and controls an amount of charge flowing to the first conductive layer according to an amount of incident light to the first semiconductor layer.

公开(公告)号：US20230137257A1

公开(公告)日：2023-05-04

申请号：US18091388

申请日：2022-12-30

Applicant: Japan Display Inc.

Inventor： Masashi TSUBUKU ,  Takanori TSUNASHIMA ,  Marina MOCHIZUKI

IPC: H01L31/12 ,  G06F1/16 ,  H01L31/101

Abstract: A photo sensor circuit includes: a photo transistor; a first switching transistor; a second switching transistor; and a capacitance element. The photo transistor includes: a gate connected to a first wiring; a source connected to a second wiring; and a drain. The first switching transistor includes: a gate connected to a third wiring; a source connected to a fourth wiring; and a drain connected to the drain of the photo transistor. The capacitance element includes: a first terminal connected to the drain of the photo transistor; and a second terminal connected to the source of the first switching transistor. The second switching transistor includes: a gate connected to a gate line; a source connected to a signal line; and a drain connected to the first terminal of the capacitance element. The photo transistor, first switching transistor, and second transistor each include an oxide semiconductor layer as a channel layer.

公开(公告)号：US20210202639A1

公开(公告)日：2021-07-01

申请号：US17199991

申请日：2021-03-12

Applicant: Japan Display Inc.

Inventor： Masashi TSUBUKU ,  Tatsuya TODA

IPC: H01L27/32 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786

Abstract: To sufficiently reduce an off-leakage current of a transistor including an oxide semiconductor as an active layer, provide a transistor having uniform characteristics when forming a large number of transistors on a large substrate, and reduce a load on a manufacturing process. A thin film transistor comprising: an active layer formed of an oxide semiconductor including at least indium and gallium; a gate electrode; a first gate insulating layer disposed between the active layer and the gate electrode on the gate electrode side; and a second gate insulating layer, which is a hydrogen block layer, disposed between the active layer and the gate electrode on the active layer side.

公开(公告)号：US20210151576A1

公开(公告)日：2021-05-20

申请号：US17162367

申请日：2021-01-29

Applicant: Japan Display Inc.

Inventor： Takeshi SAKAI ,  Tatsuya TODA ,  Masashi TSUBUKU

IPC: H01L29/45 ,  H01L29/24 ,  H01L29/786 ,  H01L21/02 ,  H01L21/443 ,  H01L21/4763 ,  H01L29/66

Abstract: A thin film transistor comprising an active layer made of an oxide semiconductor containing indium and gallium, an electrode layer including a titanium layer formed on the active layer, wherein an indium concentration is equal to or less than 1.3 times an oxygen concentration in a range of 15 nm from an interface between the active layer and the electrode layer toward the active layer.

公开(公告)号：US20210091226A1

公开(公告)日：2021-03-25

申请号：US17111810

申请日：2020-12-04

Applicant: Japan Display Inc.

Inventor： Masashi TSUBUKU ,  Michiaki SAKAMOTO ,  Takashi OKADA ,  Toshiki KANEKO ,  Tatsuya TODA

IPC: H01L29/786 ,  H01L29/417

Abstract: A semiconductor device includes a gate electrode on a substrate, a gate insulating film on the gate electrode, an oxide semiconductor film via the gate insulating film on the gate electrode, a source electrode and a drain electrode on the oxide semiconductor film, a protective film provided on the source electrode and the drain electrode; and a conductive layer provided on the protective film and overlapped on the oxide semiconductor layer. The protective film includes a first silicon oxide film and a first silicon nitride film. The first oxide film is in contact with the oxide semiconductor layer. The gate insulating film includes a second silicon nitride film and a second silicon oxide film. The second silicon oxide film is in contact with the oxide semiconductor layer. The oxide semiconductor layer has a first region located between the source electrode and the drain electrode in a plan view.

公开(公告)号：US20210005771A1

公开(公告)日：2021-01-07

申请号：US17024725

申请日：2020-09-18

Applicant: Japan Display Inc.

Inventor： Masashi TSUBUKU ,  Takanori TSUNASHIMA ,  Marina MOCHIZUKI

IPC: H01L31/12 ,  G06F1/16 ,  H01L31/101

Abstract: The problem of the present disclosure is to provide a photo sensor circuit that uses oxide semiconductor transistors and the operation of which is stable. The photo sensor circuit includes: a photo transistor; a first switching transistor; a second switching transistor; and a capacitance element. The photo transistor includes: a gate connected to a first wiring; a source connected to a second wiring; and a drain. The first switching transistor includes: a gate connected to a third wiring; a source connected to a fourth wiring; and a drain connected to the drain of the photo transistor. The capacitance element includes: a first terminal connected to the drain of the photo transistor; and a second terminal connected to the source of the first switching transistor. The second switching transistor includes: a gate connected to a gate line; a source connected to a signal line; and a drain connected to the first terminal of the capacitance element. Each of the photo transistor, the first switching transistor, and the second transistor includes an oxide semiconductor layer as a channel layer.

公开(公告)号：US20250113709A1

公开(公告)日：2025-04-03

申请号：US18895446

申请日：2024-09-25

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Kentaro MIURA ,  Masahiro WATABE

IPC: H10K59/124 ,  H01L27/12 ,  H10K59/121 ,  H10K59/131

Abstract: A display device includes a light-emitting element, a first transistor, and a second transistor, the first transistor includes a first gate electrode, a first insulating film, a first oxide semiconductor layer, a second insulating film, and a first conductive layer provided on the second insulating film, and the second transistor includes the first insulating film, a second oxide semiconductor layer, a second insulating film, and a second gate electrode, wherein an etching rate of the first oxide semiconductor layer and the second semiconductor layer is less than 3 nm/min when the first oxide semiconductor layer and the second semiconductor layer are etched using an etching solution containing phosphoric acid as a main component at 40° C.

公开(公告)号：US20250113546A1

公开(公告)日：2025-04-03

申请号：US18897024

申请日：2024-09-26

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Kentaro MIURA ,  Takeshi SAKAI ,  Akihiro HANADA ,  Masahiro WATABE

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/423

Abstract: A semiconductor device includes a gate electrode, an oxide semiconductor layer having a polycrystalline structure, and a gate insulating layer between the gate electrode and the oxide semiconductor layer. The oxide semiconductor layer includes a source region and a drain region each containing an impurity element, a channel region between the source region and the drain region, and a first region adjacent to the channel region. The first region includes a first edge extending along a first direction travelling from the source region to the drain region. The first region has a higher electrical resistivity than each of the source region and the drain region. An etching rate of the oxide semiconductor layer is less than 3 nm/min when the oxide semiconductor layer is etched using an etching solution containing phosphoric acid as a main component at 40° C.

公开(公告)号：US20250113544A1

公开(公告)日：2025-04-03

申请号：US18895591

申请日：2024-09-25

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Kentaro MIURA ,  Masahiro WATABE

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/49

Abstract: A semiconductor device according to an embodiment of the present invention includes: an oxide semiconductor layer; a first gate electrode facing the oxide semiconductor layer; a first gate insulating layer between the oxide semiconductor layer and the first gate electrode; an electrode arranged in a region overlapping the oxide semiconductor layer in a plan view and electrically connected to the oxide semiconductor layer; and a metal nitride layer between the oxide semiconductor layer and the electrode, wherein the oxide semiconductor layer is polycrystalline, and an etching rate of the oxide semiconductor layer with respect to an etchant containing phosphoric acid as a main component is less than 3 nm/min at 40° C.