公开(公告)号：US20220278137A1

公开(公告)日：2022-09-01

申请号：US17747049

申请日：2022-05-18

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Toshihide JINNAI ,  Ryo ONODERA ,  Akihiro HANADA

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.

公开(公告)号：US20220216281A1

公开(公告)日：2022-07-07

申请号：US17570396

申请日：2022-01-07

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Toshinari SASAKI ,  Ryo ONODERA

IPC: H01L27/32

Abstract: According to one embodiment, in a first concentration of an impurity element contained in a first impurity region, a second concentration of the impurity element contained in a second impurity region, a third concentration of the impurity element contained in a third impurity region, and a fourth concentration of the impurity element contained in a high-concentration impurity region, the third concentration is equal to the fourth concentration, the third concentration is higher than the first concentration, and the first concentration is higher than the second concentration.

公开(公告)号：US20210405411A1

公开(公告)日：2021-12-30

申请号：US17471881

申请日：2021-09-10

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Toshihide JINNAI ,  Isao SUZUMURA ,  Hajime WATAKABE ,  Ryo ONODERA

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/32 ,  H01L51/52 ,  H01L29/786

Abstract: A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.

公开(公告)号：US20210066351A1

公开(公告)日：2021-03-04

申请号：US16986462

申请日：2020-08-06

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Toshihide JINNAI ,  Ryo ONODERA ,  Akihiro HANADA

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66

Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.

公开(公告)号：US20250022964A1

公开(公告)日：2025-01-16

申请号：US18760532

申请日：2024-07-01

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU ,  Marina MOCHIZUKI ,  Ryo ONODERA ,  Masahiro WATABE

IPC: H01L29/786 ,  H01L29/423

Abstract: A semiconductor device comprises a first insulating layer, an oxide semiconductor layer having a polycrystalline structure on the first insulating layer, a gate insulating layer on the oxide semiconductor layer, a gate wiring on the gate insulating layer, and a second insulating layer on the gate wiring. The oxide semiconductor layer has a first region, a second region and a third region aligned toward a first direction. The first region overlaps the gate insulating layer and the gate wiring. The third region is in contact with the second insulating layer. A distance from a top surface of the second region to a top surface of the second insulating layer is longer than a distance from a top surface of the third region to the top surface of the second insulating layer.

公开(公告)号：US20240288739A1

公开(公告)日：2024-08-29

申请号：US18433729

申请日：2024-02-06

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU ,  Marina MOCHIZUKI ,  Ryo ONODERA

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L27/12

CPC classification number: G02F1/136295 ,  G02F1/13685 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1274 ,  H01L27/1225

Abstract: An electronic device comprises a first stacked structure including a first oxide semiconductor layer having a polycrystalline structure, a first insulating layer on the first oxide semiconductor layer, and a first conductive layer overlapping the first oxide semiconductor layer via the first insulating layer; and a second stacked structure including a second oxide semiconductor layer composed of the same layer as the first oxide semiconductor layer, the first insulating layer on the second oxide semiconductor layer, and a second conductive layer overlapping the second oxide semiconductor layer via the first insulating layer and composed of the same layer as the first conductive layer. A portion of the first oxide semiconductor layer not overlapping the first conductive layer contains an impurity element, and the second oxide semiconductor layer does not contain the impurity element.

公开(公告)号：US20240128273A1

公开(公告)日：2024-04-18

申请号：US18393873

申请日：2023-12-22

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Toshihide JINNAI ,  Ryo ONODERA ,  Akihiro HANADA

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/1285 ,  H01L29/66742 ,  H01L29/7869

Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.

公开(公告)号：US20240069400A1

公开(公告)日：2024-02-29

申请号：US18503351

申请日：2023-11-07

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Toshihide JINNAI ,  Isao SUZUMURA ,  Hajime WATAKABE ,  Ryo ONODERA

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L29/786 ,  H10K50/86 ,  H10K59/131

CPC classification number: G02F1/1368 ,  G02F1/136209 ,  G02F1/136277 ,  G02F1/136286 ,  H01L29/78633 ,  H01L29/78672 ,  H10K50/865 ,  H10K59/131

Abstract: A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.

公开(公告)号：US20230317853A1

公开(公告)日：2023-10-05

申请号：US18328788

申请日：2023-06-05

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Tomoyuki ITO ,  Toshihide JINNAI ,  lsao SUZUMURA ,  Akihiro HANADA ,  Ryo ONODERA

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L29/423 ,  H01L29/49 ,  H01L21/02 ,  H01L21/426 ,  H01L21/4757 ,  H01L21/4763 ,  H01L29/66

CPC classification number: H01L29/78627 ,  H01L27/124 ,  H01L27/1251 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78633 ,  H01L29/78675 ,  H01L29/7869 ,  H01L27/127 ,  H01L21/02178 ,  H01L21/02565 ,  H01L21/426 ,  H01L21/47573 ,  H01L21/47635 ,  H01L29/66969 ,  H01L27/1225 ,  G02F1/1368

Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

公开(公告)号：US20230074655A1

公开(公告)日：2023-03-09

申请号：US17987887

申请日：2022-11-16

Applicant: Japan Display Inc.

Inventor： Toshihide JINNAI ,  Hajime WATAKABE ,  Akihiro HANADA ,  Ryo ONODERA ,  lsao SUZUMURA

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L29/786 ,  H01L27/12 ,  H01L27/32

Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.