Abstract:
Methods and systems for a polarization immune wavelength division multiplexing demultiplexer are disclosed and may include, in an optoelectronic transceiver having an input coupler, a demultiplexer, and an amplitude scrambler: receiving input optical signals of different polarization via the input coupler, communicating the input optical signals to the amplitude scrambler via waveguides, configuring the average optical power in each of the waveguides utilizing the amplitude scrambler, and demultiplexing the optical signals utilizing the demultiplexer. The amplitude scrambler may include phase modulators and a coupling section. The phase modulators may include sections of P-N junctions in the two waveguides. The demultiplexer may include a Mach-Zehnder Interferometer. The demultiplexed signals may be received utilizing photodetectors. The input coupler may include a polarization splitting grating coupler. The average optical power may be configured above which demultiplexer control circuitry is able to control the demultiplexer to process incoming optical signals.
Abstract:
A system for a differential trans-impedance amplifier circuit comprising: an amplifier having a pair of input nodes and configured to generate an amplified replica of a differential voltage on said pair of input nodes; a photodiode; a pair of capacitors coupling said photodiode to said pair of input nodes; at least one resistance coupled between said pair of input nodes of said amplifier; and a bias network comprising two photodiode biasing resistances each photodiode biasing resistance coupled in series between said photodiode and a respective DC voltage. A feedback loop for the amplifier may include source followers that are operable to level shift voltages prior to coupling capacitors that couple said photodiode to said amplifier to ensure stable bias conditions for said amplifier. The source followers may include CMOS transistors. The amplifier may be integrated in a complementary metal-oxide semiconductor (CMOS) chip, which may include a CMOS photonics chip.
Abstract:
Methods and systems for split voltage domain transmitter circuits may include a two-branch output stage including a plurality of CMOS transistors, with each branch of the two-branch output stage comprising two stacked CMOS inverter pairs. The two stacked CMOS inverter pairs of a given branch are configured to drive a respective load, in phase opposition to the other branch. A pre-driver circuit is configured to receive a differential modulating signal and output, to respective inputs of the two stacked CMOS inverters, two synchronous differential voltage drive signals having a swing of half the supply voltage and being DC-shifted by half of the supply voltage with respect to each other. The load may include a series of diodes that are driven in differential mode via the drive signals. An optical signal may be modulated via the diodes.
Abstract:
Methods and systems for encoding multi-level pulse amplitude modulated signals using integrated optoelectronics are disclosed and may include generating a multi-level, amplitude-modulated optical signal utilizing an optical modulator driven by first and second electrical input signals, where the optical modulator may configure levels in the multi-level amplitude modulated optical signal, drivers are coupled to the optical modulator; and the first and second electrical input signals may be synchronized before being communicated to the drivers. The optical modulator may include optical modulator elements coupled in series and configured into groups. The number of optical modular elements and groups may configure the number of levels in the multi-level amplitude modulated optical signal. Unit drivers may be coupled to each of the groups. The electrical input signals may be synchronized before communicating them to the unit drivers utilizing flip-flops. Phase addition may be synchronized utilizing one or more electrical delay lines.
Abstract:
Methods and systems for split voltage domain receiver circuits are disclosed and may include amplifying complementary received signals in a plurality of partial voltage domains. The signals may be combined into a single differential signal in a single voltage domain. Each of the partial voltage domains may be offset by a DC voltage from the other partial voltage domains. The sum of the partial domains may be equal to a supply voltage of the integrated circuit. The complementary signals may be received from a photodiode. The amplified received signals may be amplified via stacked common source amplifiers, common emitter amplifiers, or stacked inverters. The amplified received signals may be DC coupled prior to combining. The complementary received signals may be amplified and combined via cascode amplifiers. The voltage domains may be stacked, and may be controlled via feedback loops. The photodetector may be integrated in the integrated circuit.
Abstract:
Methods and systems for a polarization immune wavelength division multiplexing demultiplexer are disclosed and may include, in an optoelectronic transceiver having an input coupler, a demultiplexer, and an amplitude scrambler: receiving input optical signals via the input coupler, communicating the input optical signals to the amplitude scrambler via waveguides, configuring the average optical power in each of the waveguides utilizing the amplitude scrambler, and demultiplexing the optical signals utilizing the demultiplexer. The amplitude scrambler may include phase modulators and a coupling section. The phase modulators may include sections of P-N junctions in the two waveguides. The demultiplexer may include a Mach-Zehnder Interferometer. The demultiplexed signals may be received utilizing photodetectors. The input coupler may include a polarization splitting grating coupler. The average optical power may be configured above which demultiplexer control circuitry is able to control the demultiplexer to process incoming optical signals.
Abstract:
Methods and systems for encoding multi-level pulse amplitude modulated signals using integrated optoelectronics are disclosed and may include generating a multi-level, amplitude-modulated optical signal utilizing an optical modulator driven by first and second electrical input signals, where the optical modulator may configure levels in the multi-level amplitude modulated optical signal, drivers are coupled to the optical modulator; and the first and second electrical input signals may be synchronized before being communicated to the drivers. The optical modulator may include optical modulator elements coupled in series and configured into groups. The number of optical modular elements and groups may configure the number of levels in the multi-level amplitude modulated optical signal. Unit drivers may be coupled to each of the groups. The electrical input signals may be synchronized before communicating them to the unit drivers utilizing flip-flops. Phase addition may be synchronized utilizing one or more electrical delay lines.
Abstract:
A system for a feedback transimpedance amplifier with sub-40 khz low-frequency cutoff is disclosed and may include amplifying electrical signals received via coupling capacitors utilizing a transimpedance amplifier (TIA) having feedback paths comprising source followers and feedback resistors. The feedback paths may be coupled prior to the coupling capacitors at inputs of the TIA. Voltages may be level shifted prior to the coupling capacitors to ensure stable bias conditions for the TIA. The TIA may be integrated in a CMOS chip and the source followers may comprise CMOS transistors. The TIA may receive current-mode logic or voltage signals. The electrical signals may be received from a photodetector, which may comprise a silicon germanium photodiode and may be differentially coupled to the TIA. The chip may comprise a CMOS photonics chip where optical signals for the photodetector in the CMOS photonics chip may be received via one or more optical fibers.
Abstract:
Methods and systems for a distributed Mach-Zehnder Interferometer (MZI) with an integrated feed forward equalizer (FFE) may include a photonic chip comprising an optical modulator having diode drivers, local voltage domain splitters, and delay elements, where each is distributed along a length of the optical modulator. Outputs of the delay elements may be coupled to inputs of the local domain splitters, and outputs of the local voltage domain splitters may be coupled to inputs of the diode drivers. A feed forward equalization (FFE) module comprising a configurable delay element with inverted outputs coupled to one of the delay elements along the length of the modulator, may be coupled to a local voltage domain splitter. An input electrical signal may be received and delayed using the delay elements and coupled to the local domain splitters, and input electrical signals for the diode drivers may be generated using the local domain splitters.
Abstract:
Methods and systems for split voltage domain receiver circuits are disclosed and may include amplifying complementary received signals in a plurality of partial voltage domains. The signals may be combined into a single differential signal in a single voltage domain. Each of the partial voltage domains may be offset by a DC voltage from the other partial voltage domains. The sum of the partial domains may be equal to a supply voltage of the integrated circuit. The complementary signals may be received from a photodiode. The amplified received signals may be amplified via stacked common source amplifiers, common emitter amplifiers, or stacked inverters. The amplified received signals may be DC coupled prior to combining. The complementary received signals may be amplified and combined via cascode amplifiers. The voltage domains may be stacked, and may be controlled via feedback loops. The photodetector may be integrated in the integrated circuit.