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公开(公告)号：US20160329908A1
公开(公告)日：2016-11-10
申请号：US15149827
申请日：2016-05-09
Applicant: MaxLinear, Inc.
Inventor： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
CPC classification number: H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
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22.发明申请DIGITAL-TO-ANALOG CONVERTER (DAC) WITH ENHANCED DYNAMIC ELEMENT MATCHING (DEM) AND CALIBRATION 有权具有增强动态元件匹配（DEM）和校准的数字到模拟转换器（DAC）公开(公告)号：US20160308545A1
公开(公告)日：2016-10-20
申请号：US15130617
申请日：2016-04-15
Applicant: MaxLinear, Inc.
Inventor： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop
CPC classification number: H03M1/066 , H03M1/1038 , H03M1/66
Abstract: Systems and methods are provided for digital-to-analog converters (DACs) with enhanced dynamic element matching (DEM) and calibration. DEM may be adapted based on assessment of one or more conditions that may affect the DACs or DEM functions thereof. The one or more condition may comprise amount of signal backoff. The adaption may comprise switching the DEM function (as a whole, or partially—e.g., individual DEM elements) on or off based on the assess conditions. The DACs may incorporate use of calibration. The DEM and/or the calibration may be applied to only a portion of the DAC, such as a particular segment (e.g., a middle segment comprising bits between the MSBs and the LSBs).
Abstract translation: 为具有增强的动态元素匹配（DEM）和校准的数模转换器（DAC）提供了系统和方法。 可以基于可能影响DAC或其DEM功能的一个或多个条件的评估来调整DEM。 一个或多个条件可以包括信号回退量。 适应可以包括基于评估条件来打开或关闭DEM功能（整体上，或部分地，例如，单独的DEM元件）。 DAC可以使用校准。 DEM和/或校准可以仅应用于DAC的一部分，例如特定段（例如，包括MSB和LSB之间的位的中间段）。
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公开(公告)号：US09362941B2
公开(公告)日：2016-06-07
申请号：US14738143
申请日：2015-06-12
Applicant: MaxLinear, Inc.
Inventor： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
CPC classification number: H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
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公开(公告)号：US20150280731A1
公开(公告)日：2015-10-01
申请号：US14738143
申请日：2015-06-12
Applicant: MaxLinear, Inc.
Inventor： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
IPC: H03M1/46
CPC classification number: H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
Abstract translation: 提供了将模拟输入值转换为数字输出代码的方法和装置的方面。 该装置的一个实施例包括数模转换器，比较器和控制逻辑电路。 数模转换器被配置为基于接收的数字参考值产生模拟参考值。 比较器被配置为在数/模转换器的分配的建立时间期满之后将模拟输入值与模拟参考值进行比较，并产生指示模拟输入值和模拟参考值之间的关系的比较结果。 控制逻辑电路被配置为基于要确定的数字输出代码的位位置来选择数模转换器的分配建立时间，并且基于比较结果来更新数字输出代码的位位置。
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公开(公告)号：US09083376B2
公开(公告)日：2015-07-14
申请号：US14261870
申请日：2014-04-25
Applicant: MaxLinear, Inc.
Inventor： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
CPC classification number: H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
Abstract translation: 提供了将模拟输入值转换为数字输出代码的方法和装置的方面。 该装置的一个实施例包括数模转换器，比较器和控制逻辑电路。 数模转换器被配置为基于接收的数字参考值产生模拟参考值。 比较器被配置为在数/模转换器的分配的建立时间期满之后将模拟输入值与模拟参考值进行比较，并产生指示模拟输入值和模拟参考值之间的关系的比较结果。 控制逻辑电路被配置为基于要确定的数字输出代码的位位置来选择数模转换器的分配建立时间，并且基于比较结果来更新数字输出代码的位位置。
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Patent Agency Ranking
公开(公告)号：US20140320328A1
公开(公告)日：2014-10-30
申请号：US14261870
申请日：2014-04-25
Applicant: MaxLinear, Inc.
Inventor： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
IPC: H03M1/46
CPC classification number: H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
Abstract translation: 提供了将模拟输入值转换为数字输出代码的方法和装置的方面。 该装置的一个实施例包括数模转换器，比较器和控制逻辑电路。 数模转换器被配置为基于接收的数字参考值产生模拟参考值。 比较器被配置为在数/模转换器的分配的建立时间期满之后将模拟输入值与模拟参考值进行比较，并产生指示模拟输入值和模拟参考值之间的关系的比较结果。 控制逻辑电路被配置为基于要确定的数字输出代码的位位置来选择数模转换器的分配建立时间，并且基于比较结果来更新数字输出代码的位位置。
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公开(公告)号：US10367515B2
公开(公告)日：2019-07-30
申请号：US16217348
申请日：2018-12-12
Applicant: Maxlinear, Inc.
Inventor： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop , Jianyu Zhu
Abstract: A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.
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28.发明授权公开(公告)号：US10097195B2
公开(公告)日：2018-10-09
申请号：US15700383
申请日：2017-09-11
Applicant: MaxLinear, Inc.
Inventor： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop
Abstract: Systems and methods are provided for digital-to-analog converters (DACs) with enhanced dynamic element matching (DEM) and calibration. DEM may be adapted based on assessment of one or more conditions that may affect the DACs or DEM functions thereof. The one or more condition may comprise amount of signal backoff. The adaption may comprise switching the DEM function (as a whole, or partially—e.g., individual DEM elements) on or off based on the assess conditions. The DACs may incorporate use of calibration. The DEM and/or the calibration may be applied to only a portion of the DAC, such as a particular segment (e.g., a middle segment comprising bits between the MSBs and the LSBs).
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公开(公告)号：US10003350B2
公开(公告)日：2018-06-19
申请号：US15617515
申请日：2017-06-08
Applicant: MaxLinear, Inc.
Inventor： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
CPC classification number: H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
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30.发明申请公开(公告)号：US20180097524A1
公开(公告)日：2018-04-05
申请号：US15700383
申请日：2017-09-11
Applicant: MaxLinear, Inc.
Inventor： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop
CPC classification number: H03M1/066 , H03M1/1038 , H03M1/66
Abstract: Systems and methods are provided for digital-to-analog converters (DACs) with enhanced dynamic element matching (DEM) and calibration. DEM may be adapted based on assessment of one or more conditions that may affect the DACs or DEM functions thereof. The one or more condition may comprise amount of signal backoff. The adaption may comprise switching the DEM function (as a whole, or partially—e.g., individual DEM elements) on or off based on the assess conditions. The DACs may incorporate use of calibration. The DEM and/or the calibration may be applied to only a portion of the DAC, such as a particular segment (e.g., a middle segment comprising bits between the MSBs and the LSBs).
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