公开(公告)号：US20230056648A1

公开(公告)日：2023-02-23

申请号：US17982397

申请日：2022-11-07

Applicant: Micron Technology, Inc.

Inventor： Hong Wan Ng ,  Chin Hui Chong ,  Hem P. Takiar ,  Seng Kim Ye ,  Kelvin Tan Aik Boo

IPC: H01L23/48 ,  H01L27/08 ,  H01L49/02 ,  H01L23/498

Abstract: Substrates for semiconductor packages, including hybrid substrates for decoupling capacitors, and associated devices, systems, and methods are disclosed herein. In one embodiment, a substrate includes a first pair and a second pair of electrical contacts on a first surface of the substrate. The first pair of electrical contacts can be configured to receive a first surface-mount capacitor, and the second pair of electrical contacts can be configured to receive a second surface-mount capacitor. The first pair of electrical contacts can be spaced apart by a first space, and the second pair of electrical contacts can be spaced apart by a second space. The first and second spaces can correspond to corresponding to first and second distances between electrical contacts of the first and second surface-mount capacitors.

公开(公告)号：US10658336B2

公开(公告)日：2020-05-19

申请号：US15960960

申请日：2018-04-24

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Ye ,  Hong Wan Ng

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L25/00 ,  H01L21/78 ,  H01L23/31

Abstract: Stacked semiconductor die assemblies with die support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a package substrate, a first semiconductor die attached to the package substrate, and a support member attached to the package substrate. The support member can be separated from the first semiconductor die, and a second semiconductor die can have one region coupled to the support member and another region coupled to the first semiconductor die.

公开(公告)号：US20180240785A1

公开(公告)日：2018-08-23

申请号：US15960960

申请日：2018-04-24

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Ye ,  Hong Wan Ng

IPC: H01L25/065 ,  H01L23/00 ,  H01L21/78 ,  H01L25/00 ,  H01L25/18 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L21/78 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8314 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/85399 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/1205 ,  H01L2924/143 ,  H01L2924/1434 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/0665

Abstract: Stacked semiconductor die assemblies with die support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a package substrate, a first semiconductor die attached to the package substrate, and a support member attached to the package substrate. The support member can be separated from the first semiconductor die, and a second semiconductor die can have one region coupled to the support member and another region coupled to the first semiconductor die.

公开(公告)号：US09627367B2

公开(公告)日：2017-04-18

申请号：US14550243

申请日：2014-11-21

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Ye ,  Hong Wan Ng

IPC: H01L25/18 ,  H01L25/065 ,  H01L21/56 ,  G06F13/16 ,  H01L23/498 ,  H01L23/31 ,  H01L25/00 ,  H01L23/00 ,  H01L21/66

CPC classification number: H01L25/0657 ,  G06F13/1668 ,  G06F13/1694 ,  H01L22/14 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/04 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/03 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/13083 ,  H01L2224/1319 ,  H01L2224/16225 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/2939 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81855 ,  H01L2224/81856 ,  H01L2224/83191 ,  H01L2224/83855 ,  H01L2224/83874 ,  H01L2224/92227 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/14 ,  H01L2924/143 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/1443 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/83101 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/83

Abstract: Memory devices with controllers under stacks of memory packages and associated systems and methods are disclosed herein. In one embodiment, a memory device is configured to couple to a host and can include a substrate, a stack of memory packages, and a controller positioned between the stack and the substrate. The controller can manage data stored by the memory packages based on commands from the host.

公开(公告)号：US20160343699A1

公开(公告)日：2016-11-24

申请号：US15229651

申请日：2016-08-05

Applicant: Micron Technology, Inc.

Inventor： Hong Wan Ng ,  Seng Kim Ye

IPC: H01L25/00 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L25/50 ,  H01L23/3128 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06135 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83201 ,  H01L2224/8385 ,  H01L2224/85399 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/1205 ,  H01L2924/143 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/15174 ,  H01L2924/15182 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/182 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2224/45099

Abstract: Stacked semiconductor die assemblies with support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a package substrate, a first semiconductor die attached to the package substrate, and a plurality of support members also attached to the package substrate. The plurality of support members can include a first support member and a second support member disposed at opposite sides of the first semiconductor die, and a second semiconductor die can be coupled to the support members such that at least a portion of the second semiconductor die is over the first semiconductor die.

公开(公告)号：US20160336300A1

公开(公告)日：2016-11-17

申请号：US15224066

申请日：2016-07-29

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Ye ,  Hong Wan Ng

IPC: H01L25/065 ,  H01L25/00 ,  H01L21/78 ,  H01L25/18

CPC classification number: H01L25/0657 ,  H01L21/78 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8314 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/85399 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/1205 ,  H01L2924/143 ,  H01L2924/1434 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/0665

Abstract: Stacked semiconductor die assemblies with die support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a package substrate, a first semiconductor die attached to the package substrate, and a support member attached to the package substrate. The support member can be separated from the first semiconductor die, and a second semiconductor die can have one region coupled to the support member and another region coupled to the first semiconductor die.

公开(公告)号：US20160148918A1

公开(公告)日：2016-05-26

申请号：US14550243

申请日：2014-11-21

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Ye ,  Hong Wan Ng

IPC: H01L25/18 ,  H01L25/065 ,  H01L21/56 ,  G06F13/16 ,  H01L23/00 ,  H01L21/66 ,  H01L23/498 ,  H01L25/00 ,  H01L23/31

CPC classification number: H01L25/0657 ,  G06F13/1668 ,  G06F13/1694 ,  H01L22/14 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/04 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/03 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/13083 ,  H01L2224/1319 ,  H01L2224/16225 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/2939 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81855 ,  H01L2224/81856 ,  H01L2224/83191 ,  H01L2224/83855 ,  H01L2224/83874 ,  H01L2224/92227 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/14 ,  H01L2924/143 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/1443 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/83101 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/83

Abstract: Memory devices with controllers under stacks of memory packages and associated systems and methods are disclosed herein. In one embodiment, a memory device is configured to couple to a host and can include a substrate, a stack of memory packages, and a controller positioned between the stack and the substrate. The controller can manage data stored by the memory packages based on commands from the host.

Abstract translation: 本文公开了具有位于堆栈内存控制器的相关系统和方法的存储器件。 在一个实施例中，存储器设备被配置为耦合到主机并且可以包括衬底，堆叠的存储器封装以及位于堆和衬底之间的控制器。 控制器可以根据来自主机的命令来管理内存包存储的数据。

公开(公告)号：US20240312890A1

公开(公告)日：2024-09-19

申请号：US18443166

申请日：2024-02-15

Applicant: Micron Technology, Inc.

Inventor： Kelvin Tan Aik Boo ,  Hong Wan Ng ,  See Hiong Leow ,  Ling Pan ,  Seng Kim Ye ,  Chin Hui Chong

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L23/49838 ,  H01L23/3128 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73215 ,  H01L2924/181 ,  H01L2924/19011

Abstract: At least one embodiment of a semiconductor device assembly include a cross-stack substrate can comprise an assembly substrate including an upper surface, a first and second die stack at the upper surface, and a cross-stack substrate spaced from the upper surface. The first and second die stacks can each include multiple semiconductor dies in electric communication with the assembly substrate, and the cross-stack substrate can be coupled to and extending between a first and a second semiconductor die of the first and second die stacks, respectively. A passive semiconductor component can be carried by the cross-stack substrate, and can be in electric communication with the assembly substrate. Further, the passive semiconductor component can be in electric communication with the first semiconductor die of the first die stack exclusively via the assembly substrate.

公开(公告)号：US11929351B2

公开(公告)日：2024-03-12

申请号：US17682948

申请日：2022-02-28

Applicant: Micron Technology, Inc.

Inventor： Kelvin Tan Aik Boo ,  Chin Hui Chong ,  Seng Kim Ye ,  Hong Wan Ng ,  Hem P. Takiar

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/48 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/48228 ,  H01L2224/48229 ,  H01L2224/85045 ,  H01L2225/0651 ,  H01L2225/06562

Abstract: An apparatus includes a substrate for mounting an integrated circuit. The substrate includes a primary layer including a first surface that is a first external surface of the substrate. The substrate includes an inner layer that is located below the primary layer and including a second surface. A portion of the second surface of the inner layer is exposed via an open area associated with the primary layer. The inner layer includes a first multiple of wire bond pads that are exposed via the open area associated with the primary layer.

公开(公告)号：US20240072022A1

公开(公告)日：2024-02-29

申请号：US17899592

申请日：2022-08-30

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Ye ,  Kelvin Tan Aik Boo ,  Hong Wan Ng ,  Chin Hui Chong

IPC: H01L25/16 ,  H01G2/06 ,  H01G13/00 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

CPC classification number: H01L25/16 ,  H01G2/06 ,  H01G13/00 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L25/18 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/48106 ,  H01L2224/48145 ,  H01L2224/48195 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/19041 ,  H01L2924/19105

Abstract: Semiconductor devices, and related systems and methods, are disclosed herein. In some embodiments, the stacked semiconductor device includes a package substrate having an inner surface, a die stack carried by the inner surface, and a stacked capacitor device carried by the inner surface adjacent to the die stack. The die stack can include one or more semiconductor dies, each of which can be electrically coupled to the inner surface by one or more bond wires and/or solder structures. The stacked capacitor device can include a first capacitor having a lower surface attached to the inner surface of the package substrate, a interposer having a first side attached to an upper surface of the first capacitor, and a second capacitor attached to a second side of the interposer opposite the first side.