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公开(公告)号：US12068764B2
公开(公告)日：2024-08-20
申请号：US18162834
申请日：2023-02-01
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Hiromichi Kitajima , Takanori Uejima , Naoya Matsumoto
CPC classification number: H04B1/0067 , H04B1/1018 , H04B1/40
Abstract: A radio frequency module includes: a module substrate having a main surface; a conductive member to partition the main surface into regions in a plan view of the main surface, and being set to ground electric potential; a switch disposed in one of the regions and connected to an antenna connection terminal; a power amplifier disposed in one of the regions and connected to the antenna connection terminal via the switch; and a low-noise amplifier disposed in one of the regions and connected to the antenna connection terminal via the switch.
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Patent Agency Ranking
公开(公告)号：US11431361B2
公开(公告)日：2022-08-30
申请号：US17396887
申请日：2021-08-09
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Hiromichi Kitajima , Takanori Uejima
Abstract: A radio-frequency module includes a power amplifier, a low noise amplifier, a first switch connected to an antenna connection terminal, a first filter, and a module substrate. The first filter has a passband including a first communication band for Time Division Duplex, has a first end connected to the antenna connection terminal via the first switch, has a second end connected to an output terminal of the power amplifier or an input terminal of the low noise amplifier. The module substrate has the power amplifier, the low noise amplifier, the first switch, and the first filter arranged thereon. The first filter is arranged between the power amplifier and the first switch and between the power amplifier and the low noise amplifier in a plan view of the module substrate.
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公开(公告)号：US10027353B2
公开(公告)日：2018-07-17
申请号：US15235267
申请日：2016-08-12
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takanori Uejima , Hiromichi Kitajima , Saneaki Ariumi , Hisao Hayafuji , Tatsuya Tsujiguchi
Abstract: A high-frequency front end circuit includes a duplexer, a phase adjustment circuit, and a power amplifier. The phase adjustment circuit is connected between the power amplifier and a transmission filter of the duplexer. The phase adjustment circuit carries out phase adjustment so that a quadrant in which an impedance ZRX (fr0) seen from the transmission filter toward the power amplifier at the fundamental frequency of a reception signal is present and a quadrant in which an impedance ZTX (fr0) seen from the power amplifier toward the transmission filter at the fundamental frequency of the reception signal is present are not in a conjugate relationship with respect to the phase.
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公开(公告)号：US10002710B2
公开(公告)日：2018-06-19
申请号：US14246280
申请日：2014-04-07
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Hiromichi Kitajima
CPC classification number: H01G2/065 , H01F17/0013 , H01F27/292 , H01L2224/16225 , H01L2924/15174 , H05K1/0306 , H05K1/112 , H05K1/115 , H05K3/3436 , H05K2201/0367 , H05K2201/09427 , H05K2201/09781 , H05K2201/10015 , H05K2201/10636 , Y02P70/611
Abstract: A module includes a multilayer body including laminated ceramic green sheets that have been fired, multiple mounting terminals arranged to mount a component thereon, the mounting terminals each including an end surface that is exposed at a main surface of the multilayer body, and multiple via conductors disposed inside the multilayer body so as to correspond to the mounting terminals at positions overlapped by the corresponding mounting terminals when viewed in a plan view. The lengths of the via conductors are adjusted so that predetermined points on the mounting terminals are positioned on the same plane.
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公开(公告)号：US09844138B2
公开(公告)日：2017-12-12
申请号：US14933268
申请日：2015-11-05
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Hiromichi Kitajima
IPC: H04M1/00 , H05K1/11 , H01L23/498 , H01L23/50 , H05K3/46 , H01L23/66 , H04M1/02 , H05K1/02 , H05K1/09 , H05K3/24
CPC classification number: H05K1/116 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/50 , H01L23/66 , H01L2223/6666 , H01L2223/6677 , H01L2224/16225 , H01L2224/73204 , H01L2924/1305 , H01L2924/15311 , H04M1/0202 , H05K1/0298 , H05K1/09 , H05K1/113 , H05K1/114 , H05K3/244 , H05K3/4611 , H05K2201/09781 , H05K2201/10015 , H05K2201/1003 , H05K2201/10098 , H01L2924/00
Abstract: A method reduces an area of a mounting electrode provided on a first surface of a multilayer body and connected to a specific component is reduced and decreases a pitch between mounting electrodes. A plating film is formed on the mounting electrodes with the reduced area. The mounting electrodes for connection to specific components are defined by first end surfaces of first via conductors, and hence, the areas of the mounting electrodes are significantly reduced, and the pitch between the mounting electrodes is significantly decreased. Also, the mounting electrodes defined by the first end surfaces of the first via conductors are connected to plane electrodes at end surfaces of second via conductors exposed from a surface of the multilayer body with internal wiring electrodes interposed therebetween. Thus, a plating film is able to be reliably provided on the mounting electrodes.
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公开(公告)号：US09118298B2
公开(公告)日：2015-08-25
申请号：US14527886
申请日：2014-10-30
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Hiromichi Kitajima
CPC classification number: H03H7/0115 , H01F17/0013 , H01F2017/0026 , H01P1/20345 , H03H7/0138 , H03H7/1766 , H03H2001/0085
Abstract: A multilayered high frequency module includes inductor conductor patterns each defined by a linear conductor having a coiled shape on intermediate insulator layers of a multilayer body. A first spiral inductor with its axis extending in the stacking direction is defined by the inductor conductor patterns on respective layers connected through conductive via holes. Overlapped portions of inner regions of the individual inductor conductor patterns within the coiled shape define an air core portion of the first inductor. A capacitor conductor pattern is provided on one layer lower than the insulator layers on which the inductor conductor patterns are provided. The capacitor conductor pattern is a flat plate and located at a position not overlapping with the air core portion when looking at the multilayer body in a plan view.
Abstract translation: 多层高频模块包括电感器导体图案，每个电感器导体图案由在多层体的中间绝缘体层上具有盘绕形状的线性导体限定。 其沿着层叠方向延伸的第一螺旋电感器由通过导电通孔连接的相应层上的电感器导体图案限定。 线圈形状内的各个电感器导体图案的内部区域的重叠部分限定了第一电感器的空心部分。 电容器导体图案设置在比设置有电感器导体图案的绝缘体层更低的一个层上。 电容器导体图案是平面图，并且位于与平面图中看到多层体时不与空气芯部重叠的位置。
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