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公开(公告)号：US20180102219A1
公开(公告)日：2018-04-12
申请号：US15725860
申请日：2017-10-05
Applicant: TDK CORPORATION
Inventor： Michihiro KUMAGAE , Akifumi KAMIJIMA , Norihiko MATSUZAKA , Junki NAKAMOTO , Kazuhiro YOSHIKAWA , Kenichi YOSHIDA
CPC classification number: H01G4/306 , H01G4/008 , H01G4/012 , H01G4/1218 , H01G4/1227 , H01G4/1245 , H01G4/1254 , H01G4/224 , H01G4/33
Abstract: A thin-film capacitor including a stacked body having a lower electrode layer, a plurality of dielectric layers stacked on the lower electrode layer, one or more internal electrode layers interposed between the dielectric layers, and an upper electrode layer that is stacked on the opposite side of the lower electrode layer with the dielectric layers and the internal electrode layers interposed between, and a cover layer that covers the stacked body. The stacked body includes opening portions that have the lower electrode layer, opens upward in a stacking direction, and has a side surface formed to include an inclined surface. The cover layer is stacked on the inclined surface of the stacked body. A curved surface with a predetermined shape is formed on the inclined surface for each pair of layers including the dielectric layer forming the inclined surface and the electrode layer, forming the inclined surface.
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公开(公告)号：US20180027660A1
公开(公告)日：2018-01-25
申请号：US15654281
申请日：2017-07-19
Applicant: TDK CORPORATION
Inventor： Kenichi YOSHIDA , Mitsuhiro TOMIKAWA
CPC classification number: H05K1/185 , H01L23/5389 , H01L24/25 , H01L24/82 , H01L2224/08155 , H01L2224/27436 , H01L2224/73265 , H05K1/036 , H05K1/115
Abstract: An electronic component embedded substrate 1 includes a substrate 10 having a wiring layer 11 and an insulating layer 12; an electronic component 20 built in the substrate 10, and having a pair of electrode layers 21A and 21B, and a dielectric layer 22; and a stress relieving layer 30 provided closer to the wiring layer 11 than the insulating layer 12 is in the lamination direction, wherein at least part of an end portion of the electronic component 20 on the wiring layer 11 side is in contact with the stress relieving layer 30, wherein at least part of an end portion of the electronic component 20 on the insulating layer 12 side is in contact with the insulating layer 12, and wherein the Young's modulus of the stress relieving layer 30 is lower than the Young's modulus of the electrode layer 21B.
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公开(公告)号：US20130130059A1
公开(公告)日：2013-05-23
申请号：US13677509
申请日：2012-11-15
Applicant: TDK CORPORATION
Inventor： Kenichi YOSHIDA , Yuhei HORIKAWA , Makoto ORIKASA , Hideyuki SEIKE
CPC classification number: H01B1/026 , C22C5/04 , C23C18/1651 , C23C18/34 , C23C18/44 , C23C18/54 , H01B1/02 , Y10T428/12701 , Y10T428/12722 , Y10T428/12778 , Y10T428/12861 , Y10T428/12889 , Y10T428/12903
Abstract: A coating is provided to a conductor, and has a layered structure of a palladium layer. The palladium layer has a crystal plane whose orientation rate is 65% or more.
Abstract translation: 向导体提供涂层，并且具有钯层的层状结构。 钯层具有取向率为65％以上的晶面。
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公开(公告)号：US20230397338A1
公开(公告)日：2023-12-07
申请号：US18449095
申请日：2023-08-14
Applicant: TDK Corporation
Inventor： Atsuhiro TSUYOSHI , Takashi OHTSUKA , Kenichi YOSHIDA
CPC classification number: H05K1/188 , H05K3/305 , H05K3/4644 , H05K2201/0183
Abstract: An electronic component has: a conductor layer M1 formed on a substrate and including lower electrodes of a capacitor; a dielectric film covering the top and side surfaces of each of the lower electrodes; upper electrodes of the capacitor which are formed on the top surfaces of the respective lower electrodes through the dielectric film; and an adhesive film disposed between the dielectric film and the top and side surfaces of each of the lower electrodes. The adhesive film is thus disposed between the dielectric film and the top and side surfaces of each of the lower electrodes.
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公开(公告)号：US20230268125A1
公开(公告)日：2023-08-24
申请号：US18012145
申请日：2020-12-24
Applicant: TDK Corporation
Inventor： Daiki ISHII , Yoshihiko YANO , Yuki YAMASHITA , Kenichi YOSHIDA , Tetsuhiro TAKAHASHI
CPC classification number: H01G4/06 , H01G4/33 , H01G4/005 , H05K1/18 , H05K2201/10015
Abstract: To provide a thin film capacitor in which warpage is less likely to occur. A thin film capacitor includes: a metal foil having roughened upper and lower surfaces; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a dielectric film covering the lower surface of the metal foil and made of a dielectric material having a thermal expansion coefficient smaller than that of the metal foil; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the first dielectric film without contacting the metal foil. The lower surface of the metal foil is thus covered with the dielectric film having a small thermal expansion coefficient, thereby making it possible to prevent the occurrence of warpage.
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Patent Agency Ranking
公开(公告)号：US20230260698A1
公开(公告)日：2023-08-17
申请号：US18012834
申请日：2020-12-24
Applicant: TDK Corporation
Inventor： Daiki ISHII , Yoshihiko YANO , Yuki YAMASHITA , Kenichi YOSHIDA , Tetsuhiro TAKAHASHI
Abstract: To provide a thin film capacitor having high flexibility. A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the dielectric film without contacting the metal foil. The particle diameter of crystal at a non-roughened center part of the metal foil is less than 15 μm in the planar direction and less than 5 μm in the thickness direction. This can not only enhance the flexibility of the metal foil to reduce a short-circuit failure in a state where the thin film capacitor is incorporated in a multilayer substrate but also enhance positional accuracy.
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公开(公告)号：US20230253446A1
公开(公告)日：2023-08-10
申请号：US18012809
申请日：2020-12-24
Applicant: TDK Corporation
Inventor： Yoshihiko YANO , Daiki ISHII , Kenichi YOSHIDA , Yuki YAMASHITA
Abstract: To provide a thin film capacitor having high adhesion performance with respect to a multilayer substrate. A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the dielectric film without contacting the metal foil. A height of the first electrode layer is lower than a height of the second electrode layer. This enhances adhesion performance when the thin film capacitor is embedded in a multilayer substrate and improves ESR characteristics.
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公开(公告)号：US20230005667A1
公开(公告)日：2023-01-05
申请号：US17784857
申请日：2020-12-04
Applicant: TDK Corporation
Inventor： Kazuhiro YOSHIKAWA , Kenichi YOSHIDA , Takashi OHTSUKA
Abstract: An electronic component includes: a conductive pattern provided on the main surface of a substrate and constituting a lower electrode; a dielectric film that covers top and side surfaces of the conductive pattern; and a conductive pattern stacked on the top surface of the conductive pattern through the dielectric film and constituting an upper electrode. A part of the dielectric film that is parallel to the main surface of the substrate is removed at least partly. Partially removing a part of the dielectric film that is parallel to the main surface of the substrate allows stress relaxation. This prevents peeling at the interface between the lower electrode and the dielectric film.
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公开(公告)号：US20210057296A1
公开(公告)日：2021-02-25
申请号：US16754395
申请日：2018-10-25
Applicant: TDK CORPORATION
Inventor： Takaaki MORITA , Kenichi YOSHIDA , Mitsuhiro TOMIKAWA
IPC: H01L23/12 , H01L23/498 , H01L23/00
Abstract: In an electric component embedded structure, a first electrode terminal provided on a first main surface includes an intra-area terminal, and the intra-area terminal is electrically connected to an overlap portion of an overlap wiring in a formation area of an electric component. Accordingly, a decrease in mounting area of the electric component embedded structure is achieved. The intra-area terminal can be electrically connected to a second electrode terminal provided on a second main surface via a first via-conductor, the overlap wiring, and a second via-conductor. The intra-area terminal is connected to a wiring (an overlap wiring) of a first insulating layer without additionally providing a rewiring layer causing an increase in thickness, and the increase in thickness is curbed, whereby a decrease in size of the electric component embedded structure is achieved.
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公开(公告)号：US20200258690A1
公开(公告)日：2020-08-13
申请号：US16617106
申请日：2018-05-16
Applicant: TDK Corporation
Inventor： Koichi TSUNODA , Kazuhiro YOSHIKAWA , Mitsuhiro TOMIKAWA , Kenichi YOSHIDA
Abstract: A thin-film capacitor includes an insulating base member, and a capacitance portion that is laminated on the insulating base member has a plurality of internal electrode layers which are laminated on the insulating base member and are provided in a lamination direction and dielectric layers which are sandwiched between the internal electrode layers. A relative dielectric constant of the dielectric layers is 100 or higher.
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