公开(公告)号：US09018769B2

公开(公告)日：2015-04-28

申请号：US14243484

申请日：2014-04-02

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L29/80 ,  H01L31/112 ,  H01L29/00 ,  H01L23/522 ,  H01L21/768 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L21/76879 ,  H01L21/76802 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/4985 ,  H01L23/5226 ,  H01L24/06 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00

Abstract: A method of forming a conductive element on a substrate and the resulting assembly are provided. The method includes forming a groove in a sacrificial layer overlying a dielectric region disposed on a substrate. The groove preferably extends along a sloped surface of the substrate. The sacrificial layer is preferably removed by a non-photolithographic method, such as ablating with a laser, mechanical milling, or sandblasting. A conductive element is formed in the groove. The grooves may be formed. The grooves and conductive elements may be formed along any surface of the substrate, including within trenches and vias formed therein, and may connect to conductive pads on the front and/or rear surface of the substrate. The conductive elements are preferably formed by plating and may or may not conform to the surface of the substrate.

Abstract translation: 提供了在基板上形成导电元件的方法和所得到的组件。 该方法包括在覆盖设置在基板上的电介质区域上的牺牲层中形成凹槽。 槽优选地沿着衬底的倾斜表面延伸。 牺牲层优选通过非光刻方法去除，例如用激光烧蚀，机械研磨或喷砂。 在沟槽中形成导电元件。 可以形成凹槽。 凹槽和导电元件可以沿着衬底的任何表面形成，包括在其中形成的沟槽和通孔内，并且可以连接到衬底的前表面和/或后表面上的导电焊盘。 导电元件优选通过电镀形成，并且可以或可以不与基板的表面一致。

公开(公告)号：US09013033B2

公开(公告)日：2015-04-21

申请号：US13741890

申请日：2013-01-15

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Wael Zohni ,  Richard Dewitt Crisp ,  Ilyas Mohammed ,  Frank Lambrecht

IPC: H01L23/498 ,  H01L23/492 ,  H01L23/00 ,  H01L25/065 ,  H01L23/13 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/492 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/06 ,  H01L24/09 ,  H01L24/32 ,  H01L24/48 ,  H01L24/50 ,  H01L24/73 ,  H01L25/0652 ,  H01L2224/06155 ,  H01L2224/06156 ,  H01L2224/0912 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/4824 ,  H01L2224/4826 ,  H01L2224/50 ,  H01L2224/73215 ,  H01L2224/73219 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic assembly can include a substrate having first and second surfaces each extending in first and second transverse directions, a peripheral edge extending in the second direction, first and second openings extending between the first and second surfaces, and a peripheral region of the second surface extending between the peripheral edge and one of the openings. The assembly can also include a first microelectronic element having a front surface facing the first surface, a rear surface opposite therefrom, and an edge extending between the front and rear surfaces. The assembly can also include a second microelectronic element having a front surface facing the rear surface of the first microelectronic element and projecting beyond the edge of the first microelectronic element. The assembly can also include a plurality of terminals exposed at the second surface, at least one of the terminals being disposed at least partially within the peripheral region.

Abstract translation: 微电子组件可以包括具有第一和第二表面的基底，每个第一表面和第二表面各自沿第一和第二横向方向延伸，沿第二方向延伸的周边边缘，在第一和第二表面之间延伸的第一和第二开口以及第二表面的周边区域 在周边边缘和其中一个开口之间延伸。 组件还可以包括具有面向第一表面的前表面的第一微电子元件，与其相对的后表面以及在前表面和后表面之间延伸的边缘。 组件还可以包括具有面向第一微电子元件的后表面的前表面并突出超过第一微电子元件的边缘的第二微电子元件。 组件还可以包括在第二表面处暴露的多个端子，至少一个端子至少部分地设置在周边区域内。

公开(公告)号：US20150084188A1

公开(公告)日：2015-03-26

申请号：US14559412

申请日：2014-12-03

Applicant: Tessera, Inc.

Inventor： Belgacem Haba

IPC: H01L23/31 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/315 ,  H01L23/3157 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/14 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/1401 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A microelectronic package has a microelectronic element and conductive posts or masses projecting above a surface of the substrate. Conductive elements at a surface of the substrate opposite therefrom are electrically interconnected with the microelectronic element. An encapsulant overlies at least a portion of the microelectronic element and may be in contact with the conductive posts or masses. The encapsulant may have openings permitting electrical connections with the conductive posts or masses. The openings may partially expose conductive masses joined to posts, fully expose top surfaces of posts and partially expose edge surfaces of posts, or may partially expose top surfaces of posts.

Abstract translation: 微电子封装具有微电子元件和突出在衬底的表面上方的导电柱或质量。 与其相对的基板的表面的导电元件与微电子元件电互连。 密封剂覆盖微电子元件的至少一部分并且可以与导电柱或块接触。 密封剂可以具有允许与导电柱或质量块电连接的开口。 开口可以部分地暴露接合到柱的导电块，完全暴露柱的顶表面并且部分地暴露柱的边缘表面，或者可以部分地暴露柱的顶表面。

公开(公告)号：US20150079733A1

公开(公告)日：2015-03-19

申请号：US14492964

申请日：2014-09-22

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

IPC: H01L25/00 ,  H01L25/065

CPC classification number: H01L25/50 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2225/06524 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/00

Abstract: A microelectronic assembly can include first, second and third stacked substantially planar elements, e.g., of dielectric or semiconductor material, and which may have a CTE of less than 10 ppm/° C. The assembly may be a microelectronic package and may incorporate active semiconductor devices in one, two or more of the first, second or third elements to function cooperatively as a system-in-a-package. In one example, an electrically conductive element having at least a portion having a thickness less than 10 microns, may be formed by plating, and may electrically connect two or more of the first, second or third elements. The conductive element may entirely underlie a surface of another one of the substantially planar elements.

Abstract translation: 微电子组件可以包括例如电介质或半导体材料的第一，第二和第三堆叠的基本平坦的元件，并且其可以具有小于10ppm /℃的CTE。组件可以是微电子封装，并且可以并入有源半导体 在第一，第二或第三元件中的一个，两个或更多个元件中的装置可以协同地作为系统级封装。 在一个示例中，具有厚度小于10微米的至少一部分的导电元件可以通过电镀形成，并且可以电连接第一，第二或第三元件中的两个或更多个。 导电元件可以完全位于另一个基本上平面的元件的表面之下。

公开(公告)号：US08952516B2

公开(公告)日：2015-02-10

申请号：US13658401

申请日：2012-10-23

Applicant: Tessera, Inc.

Inventor： Wael Zohni ,  Belgacem Haba

IPC: H01L23/495 ,  H01L23/02 ,  H01L23/48 ,  H01L29/40 ,  H01L23/52 ,  H05K7/00 ,  H01L25/065 ,  H01L23/13 ,  H01L25/10 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49575 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/06155 ,  H01L2224/06156 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/29034 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/4826 ,  H01L2224/49109 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/206 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package can include a substrate having first and second opposed surfaces, and first and second microelectronic elements having front surfaces facing the first surface. The substrate can have a plurality of substrate contacts at the first surface and a plurality of terminals at the second surface. Each microelectronic element can have a plurality of element contacts at the front surface thereof. The element contacts can be joined with corresponding ones of the substrate contacts. The front surface of the second microelectronic element can partially overlie a rear surface of the first microelectronic element and can be attached thereto. The element contacts of the first microelectronic element can be arranged in an area array and are flip-chip bonded with a first set of the substrate contacts. The element contacts of the second microelectronic element can be joined with a second set of the substrate contacts by conductive masses.

Abstract translation: 微电子封装可以包括具有第一和第二相对表面的衬底，以及具有面向第一表面的前表面的第一和第二微电子元件。 基板可以在第一表面具有多个基板触点，在第二表面可以具有多个端子。 每个微电子元件可以在其前表面具有多个元件触点。 元件触点可以与相应的基板触点连接。 第二微电子元件的前表面可以部分地覆盖在第一微电子元件的后表面上并且可以附接到第一微电子元件的后表面。 第一微电子元件的元件触点可以布置在区域阵列中，并且与第一组基板触点倒装芯片接合。 第二微电子元件的元件触点可以通过导电块与第二组基板触点接合。

公开(公告)号：US20150028480A1

公开(公告)日：2015-01-29

申请号：US14513563

申请日：2014-10-14

Applicant: Tessera, Inc.

Inventor： Kazuo Sakuma ,  Philip Damberg ,  Belgacem Haba

IPC: H01L23/00 ,  H05K1/03 ,  H05K1/02 ,  H05K1/09

CPC classification number: H01L21/4853 ,  H01L23/3142 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/01 ,  H01L24/15 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/2064 ,  H01L2924/20641 ,  H05K1/0284 ,  H05K1/0306 ,  H05K1/09 ,  H05K3/002 ,  H05K2201/0166 ,  H01L2924/00

Abstract: An interconnection substrate includes a plurality of electrically conductive elements of at least one wiring layer defining first and second lateral directions. Electrically conductive projections for bonding to electrically conductive contacts of at least one component external to the substrate, extend from the conductive elements above the at least one wiring layer. The conductive projections have end portions remote from the conductive elements and neck portions between the conductive elements and the end portions. The end portions have lower surfaces extending outwardly from the neck portions in at least one of the lateral directions. The substrate further includes a dielectric layer overlying the conductive elements and extending upwardly along the neck portions at least to the lower surfaces. At least portions of the dielectric layer between the conductive projections are recessed below a height of the lower surfaces.

Abstract translation: 互连衬底包括限定第一和第二横向方向的至少一个布线层的多个导电元件。 导电突起，用于粘合到基板外部的至少一个部件的导电触点，从导电元件延伸到至少一个布线层之上。 导电突起具有远离导电元件的端部和导电元件与端部之间的颈部。 端部具有在至少一个横向方向上从颈部部分向外延伸的下表面。 衬底还包括覆盖导电元件并且沿着颈部部分至少向下表面向上延伸的电介质层。 导电突起之间的电介质层的至少部分凹陷在下表面的高度之下。

公开(公告)号：US08829680B2

公开(公告)日：2014-09-09

申请号：US14089057

申请日：2013-11-25

Applicant: Tessera, Inc.

Inventor： Cyprian Emeka Uzoh ,  Belgacem Haba ,  Craig Mitchell

IPC: H01L21/32 ,  H01L21/768

CPC classification number: H01L23/528 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53238 ,  H01L24/13 ,  H01L24/14 ,  H01L2221/1094 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/14181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05552

Abstract: Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an interconnect structure that results in the interconnect structure having a top surface and portions of the side walls of the interconnect structure covered in a dissimilar material. In some embodiments, the dissimilar material can be a conductive material or a nano-alloy. The interconnect structure can be formed by removing a portion of the interconnect structure, and covering the interconnect structure with the dissimilar material. The interconnect structure can comprise a damascene structure, such as a single or dual damascene structure, or alternatively, can comprise a silicon-through via (TSV) structure.

Abstract translation: 提供了用于形成半导体器件的方法和装置，其可以包括任何数量的特征。 一个特征是形成互连结构的方法，其导致互连结构具有覆盖在不同材料中的互连结构的顶表面和侧壁的部分。 在一些实施例中，异种材料可以是导电材料或纳米合金。 互连结构可以通过去除互连结构的一部分并且用不同材料覆盖互连结构来形成。 互连结构可以包括镶嵌结构，例如单镶嵌结构或双镶嵌结构，或者可以包括硅通孔（TSV）结构。

公开(公告)号：US20140239513A1

公开(公告)日：2014-08-28

申请号：US14270885

申请日：2014-05-06

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Wael Zohni ,  Richard Dewitt Crisp

IPC: H01L25/065

CPC classification number: H01L25/065 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L25/105 ,  H01L27/14618 ,  H01L2223/6611 ,  H01L2224/0401 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48096 ,  H01L2224/4824 ,  H01L2224/48477 ,  H01L2224/48599 ,  H01L2224/49111 ,  H01L2224/49174 ,  H01L2224/4945 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A microelectronic assembly includes a dielectric element having first and second surfaces, first and second apertures extending between the first and second surfaces and defining a central region of the first surface between the first and second apertures, first and second microelectronic elements, and leads extending from contacts exposed at respective front surfaces of the first and second microelectronic elements to central terminals exposed at the central region. The front surface of the first microelectronic element can face the second surface of the dielectric element. The front surface of the second microelectronic element can face a rear surface of the first microelectronic element. The contacts of the second microelectronic element can project beyond an edge of the first microelectronic element. At least first and second ones of the leads can electrically interconnect a first central terminal of the central terminals with each of the first and second microelectronic elements.

Abstract translation: 微电子组件包括具有第一和第二表面的电介质元件，第一和第二孔在第一和第二表面之间延伸并且限定第一和第二孔之间的第一表面的中心区域，第一和第二微电子元件以及从 在第一和第二微电子元件的相应前表面处暴露在中央区域的中心端子的触点。 第一微电子元件的前表面可面向电介质元件的第二表面。 第二微电子元件的前表面可面对第一微电子元件的后表面。 第二微电子元件的触点可突出超过第一微电子元件的边缘。 至少第一和第二引线可以将中心端子的第一中心端子与第一和第二微电子元件中的每一个电互连。

公开(公告)号：US20140213021A1

公开(公告)日：2014-07-31

申请号：US14242279

申请日：2014-04-01

Applicant: TESSERA, INC.

Inventor： Belgacem Haba ,  Teck-Gyu Kang ,  Ilyas Mohammed ,  Ellis Chau

IPC: H01L21/56

CPC classification number: H01L21/565 ,  G01R31/2886 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/49894 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of making a microelectronic assembly can include molding a dielectric material around at least two conductive elements which project above a height of a substrate having a microelectronic element mounted thereon, so that remote surfaces of the conductive elements remain accessible and exposed within openings extending from an exterior surface of the molded dielectric material. The remote surfaces can be disposed at heights from said surface of said substrate which are lower or higher than a height of the exterior surface of the molded dielectric material from the substrate surface. The conductive elements can be arranged to simultaneously carry first and second different electric potentials: e.g., power, ground or signal potentials.

Abstract translation: 制造微电子组件的方法可以包括将电介质材料模制成围绕安装有微电子元件的衬底的高度突出的至少两个导电元件，使得导电元件的远端表面保持可接近并暴露在从 模制电介质材料的外表面。 所述远程表面可以从所述衬底的所述表面高度设置，所述表面低于或高于所述模制电介质材料的外表面与所述衬底表面的高度。 导电元件可被布置成同时携带第一和第二不同的电势：例如功率，接地或信号电位。

公开(公告)号：US08709913B2

公开(公告)日：2014-04-29

申请号：US13939725

申请日：2013-07-11

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

IPC: H01L21/30

CPC classification number: H01L25/00 ,  H01L23/481 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05023 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05186 ,  H01L2224/0519 ,  H01L2224/05568 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0603 ,  H01L2224/0613 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06505 ,  H01L2224/116 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/136 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/276 ,  H01L2224/29023 ,  H01L2224/29082 ,  H01L2224/291 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/32148 ,  H01L2224/32238 ,  H01L2224/73103 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/8123 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/8323 ,  H01L2224/83815 ,  H01L2224/8383 ,  H01L2224/9202 ,  H01L2224/9221 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01029 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/35 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/05552 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Disclosed are a microelectronic assembly of two elements and a method of forming same. A microelectronic element includes a major surface, and a dielectric layer and at least one bond pad exposed at the major surface. The microelectronic element may contain a plurality of active circuit elements. A first metal layer is deposited overlying the at least one bond pad and the dielectric layer. A second element having a second metal layer deposited thereon is provided, and the first metal layer is joined with the second metal layer. The assembly may be severed along dicing lanes into individual units each including a chip.

Abstract translation: 公开了两种元件的微电子组件及其形成方法。 微电子元件包括主表面和介电层以及在主表面处暴露的至少一个接合焊盘。 微电子元件可以包含多个有源电路元件。 沉积第一金属层，覆盖至少一个接合焊盘和电介质层。 提供了具有沉积在其上的第二金属层的第二元件，并且第一金属层与第二金属层接合。 组件可以沿着切割通道切割成各自包括芯片的单元。