公开(公告)号：US20150206738A1

公开(公告)日：2015-07-23

申请号：US14159970

申请日：2014-01-21

Applicant: SEMATECH, Inc.

Inventor： Abbas Rastegar

IPC: H01L21/02 ,  B08B3/12

CPC classification number: B08B3/12 ,  B06B1/0276 ,  B06B1/0622 ,  B06B2201/71 ,  C11D11/0047 ,  C11D11/007 ,  H01L21/67051

Abstract: An apparatus, system, and method for cleaning surfaces is presented. One embodiment of the system includes an array of surface acoustic wave (SAW) transducers coupled to a substrate. The system may include a positioning mechanism coupled to at least one of a target surface or the array of SAW transducers, and configured to position the array of SAW transducers within an effective cleaning distance of a target surface. The system may also include a cleaning liquid supply arranged to provide cleaning liquid for coupling the array of SAW transducers to the target surface. The system may further include a controller coupled to the array of SAW transducers and configured to activate the array of SAW transducers. At least one of the SAW transducers may be formed to focus cleaning liquid on a focal point and jet cleaning liquid in a direction substantially out of the place of the SAW transducer.

Abstract translation: 提出了一种用于清洁表面的设备，系统和方法。 该系统的一个实施例包括耦合到衬底的表面声波（SAW）传感器的阵列。 该系统可以包括耦合到目标表面或SAW换能器阵列中的至少一个的定位机构，并且被配置为将SAW换能器阵列置于目标表面的有效清洁距离内。 该系统还可以包括布置成提供用于将SAW换能器阵列耦合到目标表面的清洁液体的清洁液体供应。 该系统还可以包括耦合到SAW换能器阵列并被配置为激活SAW换能器阵列的控制器。 可以形成至少一个SAW换能器，以将清洁液体聚焦在焦点上，并将射流清洁液体基本上不在SAW换能器的位置。

公开(公告)号：US20150111372A1

公开(公告)日：2015-04-23

申请号：US14519250

申请日：2014-10-21

Applicant: Sematech, Inc.

Inventor： Robert TIECKELMANN ,  Wei-Yip LOH ,  Rinus Tek Po LEE

IPC: H01L21/225

CPC classification number: H01L21/2254 ,  H01L21/2225 ,  H01L21/228

Abstract: Provided are methods for preparing a doped silicon material. The methods include contacting a surface of a silicon material with a dopant solution comprising a dopant-containing compound selected from a phosphorus-containing compound and an arsenic-containing compound, to form a layer of dopant material on the surface; and diffusing the dopant into the silicon material, thereby forming the doped silicon material, wherein the doped silicon material has a sheet resistance (Rs) of less than or equal to 2,000 Ω/sq.

Abstract translation: 提供了制备掺杂硅材料的方法。 所述方法包括使硅材料的表面与包含选自含磷化合物和含砷化合物的掺杂剂化合物的掺杂剂溶液接触，以在表面上形成掺杂剂材料层; 并将掺杂剂扩散到硅材料中，从而形成掺杂的硅材料，其中掺杂硅材料的薄层电阻（Rs）小于或等于2,000＆OHgr / sq。

公开(公告)号：US08734586B2

公开(公告)日：2014-05-27

申请号：US13365077

申请日：2012-02-02

Applicant: Vibhu Jindal ,  Junichi Kageyama

Inventor： Vibhu Jindal ,  Junichi Kageyama

IPC: B08B7/00

CPC classification number: G03F1/22 ,  B08B7/04 ,  B82Y10/00 ,  B82Y40/00 ,  C23C14/34 ,  C23C14/564 ,  G03F1/60

Abstract: A process for cleaning and restoring deposition shield surfaces which results in a cleaned shield having a surface roughness of between about 200 microinches and about 500 microinches and a particle surface density of less than about 0.1 particles/mm2 of particles between about 1 micron and about 5 microns in size and no particles less than about 1 micron in size and method for use thereof is disclosed.

Abstract translation: 一种用于清洁和恢复沉积屏蔽表面的方法，其导致具有约200微英寸至约500微英寸之间的表面粗糙度和小于约0.1微米/ mm 2的颗粒的颗粒表面密度在约1微米至约5微米之间的清洁屏蔽 公开了尺寸微米和尺寸小于约1微米的颗粒及其使用方法。

公开(公告)号：US08436422B2

公开(公告)日：2013-05-07

申请号：US12719697

申请日：2010-03-08

Applicant: Wei-Yip Loh ,  Brian Coss ,  Kanghoon Jeon

Inventor： Wei-Yip Loh ,  Brian Coss ,  Kanghoon Jeon

IPC: H01L29/66

CPC classification number: H01L29/66477 ,  H01L29/7391 ,  H01L29/78

Abstract: Horizontal and vertical tunneling field-effect transistors (TFETs) having an abrupt junction between source and drain regions increases probability of direct tunneling of carriers (e.g., electrons and holes). The increased probability allows a higher achievable on current in TFETs having the abrupt junction. The abrupt junction may be formed by placement of a dielectric layer or a dielectric layer and a semiconductor layer in a current path between the source and drain regions. The dielectric layer may be a low permittivity oxide such as silicon oxide, lanthanum oxide, zirconium oxide, or aluminum oxide.

公开(公告)号：US08178939B2

公开(公告)日：2012-05-15

申请号：US12488569

申请日：2009-06-21

Applicant: Wei-Yip Loh ,  Prashant Majhi ,  Brian Coss

Inventor： Wei-Yip Loh ,  Prashant Majhi ,  Brian Coss

IPC: H01L29/47 ,  H01L29/788 ,  H01L29/94 ,  H01L29/76 ,  H01L29/78

CPC classification number: H01L29/1037 ,  H01L21/28518 ,  H01L21/823835 ,  H01L21/823842 ,  H01L21/823871 ,  H01L29/0847 ,  H01L29/66636 ,  H01L29/7834

Abstract: A semiconductor structure may include a semiconductor bulk region with a gate stack on the semiconductor bulk region. The source region and the drain region in the semiconductor bulk region may be located on opposing sides of a channel region below the gate stack. An interfacial layer coupled to the channel region may modify a workfunction of a metal-semiconductor contact. In a MOSFET, the metal-semiconductor contact may be between a metal contact and the source region and the drain region. In a Schottky barrier-MOSFET, the metal-semiconductor contact may be between a silicide region in the source region and/or the drain region and the channel region. The interfacial layer may use a dielectric-dipole mitigated scheme and may include a conducting layer and a dielectric layer. The dielectric layer may include lanthanum oxide or aluminum oxide used to tune the workfunction of the metal-semiconductor contact.

Abstract translation: 半导体结构可以包括在半导体体区域上具有栅极堆叠的半导体本体区域。 半导体本体区域中的源极区域和漏极区域可以位于栅极叠层下方的沟道区域的相对侧上。 耦合到沟道区的界面层可以改变金属 - 半导体接触的功函数。 在MOSFET中，金属 - 半导体接触可以在金属接触件与源极区域和漏极区域之间。 在肖特基势垒MOSFET中，金属 - 半导体接触可以在源极区域和/或漏极区域和沟道区域中的硅化物区域之间。 界面层可以使用介电偶极减轻方案，并且可以包括导电层和电介质层。 电介质层可以包括用于调节金属 - 半导体接触的功函数的氧化镧或氧化铝。

公开(公告)号：US08134684B2

公开(公告)日：2012-03-13

申请号：US12035963

申请日：2008-02-22

Applicant: Paul A. Zimmerman ,  Jeffrey Byers ,  Carita Simons, legal representative

Inventor： Paul A. Zimmerman ,  Jeffrey Byers

IPC: G03B27/42

CPC classification number: G03F7/2041 ,  B82Y30/00 ,  C01G27/02 ,  C01P2004/64 ,  C01P2006/60 ,  G03F7/0043

Abstract: Method, apparatus, and composition of matter suited for use with, for example, immersion lithography. The composition of matter includes hafnium dioxide nanoparticles having diameters less than or equal to about 15 nanometers. The apparatus includes the composition of matter, a light source, a platform for supporting a work piece, and a lens element. The method includes providing a light source, providing a lens element between the light source and a work piece, providing the composition of matter between the lens element and the work piece, and exposing the work piece to light provided by the light source by passing light from the light source through the lens element and the composition of matter to the work piece.

Abstract translation: 适用于例如浸没光刻的物质的方法，装置和组成。 物质的组成包括直径小于或等于约15纳米的二氧化铪纳米颗粒。 该装置包括物质的组成，光源，用于支撑工件的平台和透镜元件。 该方法包括提供光源，在光源和工件之间提供透镜元件，在透镜元件和工件之间提供物质的组成，并将工件暴露于由光源通过光提供的光 从光源通过透镜元件和物质的组成到工件。

公开(公告)号：US20120024313A1

公开(公告)日：2012-02-02

申请号：US12847621

申请日：2010-07-30

Applicant: Abbas Rastegar

Inventor： Abbas Rastegar

IPC: B08B3/12

CPC classification number: H01L21/67046 ,  B06B1/0276 ,  B06B1/0622 ,  B06B2201/20 ,  B06B2201/55 ,  B06B2201/71 ,  B08B3/12 ,  H01L21/02041

Abstract: An apparatus, system, and method for a Gigasonic Brush for cleaning surfaces is presented. One embodiment of the system includes an array of acoustic transducers coupled to a substrate where the individual acoustic transducers have sizes in the range of 9 um2 to 250,000 um2. The system may include a positioning mechanism coupled to at least one of a target surface or the array of acoustic transducers, and configured to position the array of acoustic transducers within 1 millimeter of a target surface. The system may also include a cleaning liquid supply arranged to provide cleaning liquid for coupling the array of acoustic transducers to the target surface. The system may further include a controller coupled to the array of acoustic transducers and configured to activate the array of acoustic transducers.

Abstract translation: 介绍了一种用于清洁表面的Gigasonic Brush的设备，系统和方法。 该系统的一个实施例包括耦合到衬底的声学换能器阵列，其中各个声学换能器的尺寸在9um2至250,000um2的范围内。 系统可以包括耦合到目标表面或声换能器阵列中的至少一个的定位机构，并且被配置为将声换能器阵列定位在目标表面的1毫米内。 该系统还可以包括布置成提供用于将声换能器阵列耦合到目标表面的清洁液体的清洁液体供应。 系统还可以包括耦合到声换能器阵列并被配置为激活声换能器阵列的控制器。

公开(公告)号：US07741168B2

公开(公告)日：2010-06-22

申请号：US11782984

申请日：2007-07-25

Applicant: Seung-Chul Song ,  Joel Barnett ,  Byong Sun Ju

Inventor： Seung-Chul Song ,  Joel Barnett ,  Byong Sun Ju

IPC: H01L21/8238

CPC classification number: H01L21/823807 ,  H01L29/7843

Abstract: Systems and methods for fabricating semiconductor devices with dual-stress layers using double-stress oxide/nitride stacks. A method comprises providing NMOS and PMOS regions, selectively forming a dual-stack tensile stress layer over the NMOS region by depositing a tensile silicon nitride layer over the NMOS and PMOS regions, depositing a tensile silicon oxide layer over the tensile silicon nitride layer, removing a portion of the tensile silicon oxide layer from the PMOS region, and removing a portion of the tensile silicon nitride layer from the NMOS region and selectively forming a dual stack compressive stress layer over the PMOS region by depositing a compressive silicon nitride layer over the NMOS and PMOS regions, depositing a compressive silicon oxide layer over the compressive silicon nitride layer, removing a portion of the compressive silicon oxide layer from the NMOS region, and removing a portion of the compressive silicon nitride layer from the NMOS region.

Abstract translation: 使用双应力氧化物/氮化物叠层制造具有双应力层的半导体器件的系统和方法。 一种方法包括提供NMOS和PMOS区域，通过在NMOS和PMOS区域上沉积拉伸氮化硅层，在拉伸氮化硅层上方沉积拉伸氧化硅层，去除 来自所述PMOS区的所述拉伸氧化硅层的一部分，以及从所述NMOS区域去除所述拉伸氮化硅层的一部分，并且在所述PMOS区上选择性地形成双层压应力层，通过在所述NMOS上沉积压缩氮化硅层 和PMOS区域，在所述压缩氮化硅层上沉积压缩氧化硅层，从所述NMOS区域去除所述压缩氧化硅层的一部分，以及从所述NMOS区域移除所述压缩氮化硅层的一部分。

公开(公告)号：US07732120B2

公开(公告)日：2010-06-08

申请号：US12249416

申请日：2008-10-10

Applicant: Paul A. Zimmerman ,  Chris K. Van Peski

Inventor： Paul A. Zimmerman ,  Chris K. Van Peski

IPC: G03F7/00 ,  G03F7/004

CPC classification number: G03F1/62 ,  H01J2237/3165 ,  Y10T428/31544

Abstract: The present invention relates generally to the fields of semiconductor lithography. More particularly, it concerns methods, compositions, and apparatuses relating to 157 nm and 193 nm soft pellicles and the use of perfluorinated polymers in the creation of pellicles.

Abstract translation: 本发明一般涉及半导体光刻领域。 更具体地，涉及与157nm和193nm软膜相关的方法，组合物和装置以及全氟化聚合物在产生薄膜中的用途。

公开(公告)号：US07709180B2

公开(公告)日：2010-05-04

申请号：US12241624

申请日：2008-09-30

Applicant: Paul A. Zimmerman ,  Chris Van Peski

Inventor： Paul A. Zimmerman ,  Chris Van Peski

IPC: G03F7/00 ,  G03F7/004

CPC classification number: G03F1/62 ,  H01J2237/3165

Abstract: The present invention relates generally to the fields of semiconductor lithography. More particularly, it concerns methods, compositions, and apparatuses relating to 157 nm, 167 nm, 193 nm, 248 nm, 365 nm, and 436 nm soft pellicles and the use of perfluorinated polymers in the creation of pellicles.

Abstract translation: 本发明一般涉及半导体光刻领域。 更具体地，涉及与157nm，167nm，193nm，248nm，365nm和436nm软膜相关的方法，组合物和装置，以及全氟化聚合物在产生薄膜中的用途。