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    ELECTRONIC DEVICE AND ANTI-STATIC PROTECTION CIRCUIT FOR SAME
    21.
    发明申请
    ELECTRONIC DEVICE AND ANTI-STATIC PROTECTION CIRCUIT FOR SAME 审中-公开
    电子设备和防静电保护电路

    公开(公告)号：US20130265688A1

    公开(公告)日：2013-10-10

    申请号：US13848676

    申请日：2013-03-21

    Applicant: HONG FU JIN PRECISION INDUSTRY (SHENZHEN) CO., LTD. ,  HON HAI PRECISION INDUSTRY CO., LTD.

    Inventor： Xing-Hua TANG

    IPC: H05F3/04

    CPC classification number: H05F3/04 ,  H05K1/0259 ,  H05K9/0067 ,  H05K2201/09272

    Abstract: An anti-static protection circuit includes a first discharge unit and a second discharge unit. The first discharge unit is connected to a port of an electronic device, and includes a number of first sharp turning points. The first sharp turning points absorb static electricity flowing to the first discharge unit from the port, and discharge part of the static electricity to the air. The second discharge unit is grounded and includes a number of second sharp turning points spaced apart from and directly opposing to the corresponding first sharp turning points of the first discharge unit. The second sharp turning points absorb part of the static electricity on the first sharp turning points, and discharges the part of the static electricity to the ground. A related electronic device employing the protection circuit is also provided.

    Abstract translation: 防静电保护电路包括第一放电单元和第二放电单元。 第一放电单元连接到电子设备的端口，并且包括多个第一尖锐转折点。 第一个急转弯点吸收从端口流向第一排放单元的静电，并将部分静电排出空气。 第二排出单元接地，并且包括与第一排放单元的相应的第一锋利转折点间隔开并直接相对的多个第二尖锐转折点。 第二个尖锐的转折点吸收了第一个锋利转折点的部分静电，并将部分静电放到地面上。 还提供了采用保护电路的相关电子设备。

    THROUGH WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF
    22.
    发明申请
    THROUGH WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权
    通过接线基板及其制造方法

    公开(公告)号：US20120103679A1

    公开(公告)日：2012-05-03

    申请号：US13344091

    申请日：2012-01-05

    Applicant: Satoshi YAMAMOTO ,  Hirokazu HASHIMOTO

    Inventor： Satoshi YAMAMOTO ,  Hirokazu HASHIMOTO

    IPC: H05K1/11 ,  H05K3/00

    CPC classification number: H05K3/101 ,  H01L23/15 ,  H01L23/473 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0272 ,  H05K3/4053 ,  H05K2201/09272 ,  H01L2924/00

    Abstract: A through wiring substrate includes a substrate having a first face and a second face; and a through-wire formed by filling, or forming a film of, an electrically-conductive substance into a through-hole, which penetrates between the first face and the second face. The through-hole has a bend part comprising an inner peripheral part that is curved in a recessed shape and an outer peripheral part that is curved in a protruding shape, in a longitudinal cross-section of the through-hole, and at least the inner peripheral part is formed in a circular arc shape in the longitudinal cross-section.

    Abstract translation: 通过布线基板包括具有第一面和第二面的基板; 以及通过将导电性物质的膜填充或形成为穿透在第一面和第二面之间的贯通孔而形成的贯通线。 通孔具有弯曲部，该弯曲部包括在凹部中弯曲的内周部和在通孔的纵向截面中弯曲成突出形状的外周部，并且至少内部 周边部分在纵向截面中形成为圆弧形。

    Film pattern forming method, device, electro-optical apparatus, and electronic appliance
    24.
    发明授权
    Film pattern forming method, device, electro-optical apparatus, and electronic appliance 有权
    薄膜图案形成方法，装置，电光装置和电子设备

    公开(公告)号：US07803515B2

    公开(公告)日：2010-09-28

    申请号：US11556384

    申请日：2006-11-03

    Applicant: Toshimitsu Hirai ,  Katsuyuki Moriya

    Inventor： Toshimitsu Hirai ,  Katsuyuki Moriya

    IPC: H01L21/00

    CPC classification number: H05K3/1258 ,  G02F2001/136295 ,  H05K3/125 ,  H05K2201/09272 ,  H05K2201/09727 ,  H05K2203/013 ,  H05K2203/0568

    Abstract: A method for forming a film pattern by disposing a functional fluid on a substrate, includes: forming a partition wall that includes a first opening that corresponds to a first film pattern and a second opening that corresponds to a second film pattern; and disposing a droplet of the functional fluid into the first opening, so that the functional fluid is disposed into the second opening by a self-flow of the functional fluid; wherein: the first film pattern is linear; the second film pattern is narrower than the first film pattern, and is connected to the first film pattern at a rear edge thereof; and a front edge of the second film pattern has a missing part in which a corner of a rectangular contour is missing.

    Abstract translation: 通过在基板上设置功能流体来形成膜图案的方法包括：形成分隔壁，其包括对应于第一膜图案的第一开口和对应于第二膜图案的第二开口; 并且将所述功能流体液滴设置在所述第一开口中，使得所述功能流体通过所述功能流体的自身流动而被设置在所述第二开口中; 其中：所述第一膜图案是线性的; 所述第二胶片图案比所述第一胶片图案窄，并且在其后缘与所述第一胶片图案连接; 并且第二胶片图案的前边缘具有缺少矩形轮廓的角部的缺失部分。

    Differential transmission line having a curved region with selected radius of curvature
    25.
    发明授权
    Differential transmission line having a curved region with selected radius of curvature 有权
    差动传输线具有选定的曲率半径的弯曲区域

    公开(公告)号：US07429902B2

    公开(公告)日：2008-09-30

    申请号：US11980616

    申请日：2007-10-31

    Applicant: Hiroshi Kanno ,  Kazuyuki Sakiyama ,  Ushio Sangawa ,  Tomoyasu Fujishima

    Inventor： Hiroshi Kanno ,  Kazuyuki Sakiyama ,  Ushio Sangawa ,  Tomoyasu Fujishima

    IPC: H01P3/08

    CPC classification number: H01P3/081 ,  H05K1/0245 ,  H05K1/0253 ,  H05K2201/09272

    Abstract: A differential transmission line includes: a substrate; a ground conductor layer; and a first and a second signal conductor disposed in parallel to each other on the substrate. The first signal conductor and the ground conductor layer compose a first transmission line, whereas the second signal conductor and the ground conductor layer compose a second transmission line. The first transmission line and the second transmission line compose a differential transmission line. The differential transmission line includes a curved region, with a straight region being connected to each end of the curved region. In the ground conductor layer in the curved region, a plurality of slots orthogonal to a local transmission direction of signals in the curved region are formed, and the slots are connected to one another on the inner side of the curvature.

    Abstract translation: 差动传输线包括：基板; 接地导体层; 以及在基板上彼此平行设置的第一和第二信号导体。 第一信号导体和接地导体层构成第一传输线，而第二信号导体和接地导体层构成第二传输线。 第一传输线和第二传输线构成差动传输线。 差动传输线包括弯曲区域，直线区域连接到弯曲区域的每一端。 在弯曲区域的接地导体层中，形成与弯曲区域中的信号的局部传输方向正交的多个槽，并且在曲率的内侧上彼此连接。

    Integrated circuit chip module
    26.
    发明授权
    Integrated circuit chip module 有权
    集成电路芯片模块

    公开(公告)号：US07408256B2

    公开(公告)日：2008-08-05

    申请号：US11535115

    申请日：2006-09-26

    Applicant: Kohji Shinomiya

    Inventor： Kohji Shinomiya

    IPC: H01L23/52

    CPC classification number: H01L23/49838 ,  H01L23/50 ,  H01L23/552 ,  H01L25/0655 ,  H01L25/18 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0216 ,  H05K1/0231 ,  H05K1/181 ,  H05K1/189 ,  H05K2201/09236 ,  H05K2201/09254 ,  H05K2201/09272 ,  H05K2201/10522 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00

    Abstract: An integrated circuit chip module includes a first integrated circuit chip including a first power source pad for a first power voltage and an adjacent second power source pad for a second power voltage, the first power voltage being higher than the second power voltage, a second integrated circuit chip including a third power source pad for the first power voltage and an adjacent fourth power source pad for the second power voltage, and a wiring board including a first power source wire electrically connected to the first power source pad, a second power source wire electrically connected to the second power source pad, a third power source wire electrically connected to the third power source pad, and a fourth power source wire electrically connected to the fourth power source pad. Distance between the first and second power source wires is shorter than distance between the first or second power source wires and the third or fourth power source wires, and distance between the third and fourth power source wires is shorter than distance between the first or second power source wires and the third or fourth power source wires.

    Abstract translation: 集成电路芯片模块包括第一集成电路芯片，其包括用于第一电源电压的第一电源焊盘和用于第二电源电压的相邻的第二电源焊盘，所述第一电源电压高于所述第二电源电压，第二集成电路 电路芯片，包括用于第一电源电压的第三电源焊盘和用于第二电源电压的相邻第四电源焊盘;以及布线板，包括电连接到第一电源焊盘的第一电源线，第二电源线 电连接到第二电源焊盘，电连接到第三电源焊盘的第三电源线和电连接到第四电源焊盘的第四电源线。 第一和第二电源线之间的距离短于第一或第二电源线与第三或第四电源线之间的距离，并且第三和第四电源线之间的距离短于第一或第二电源线之间的距离 源极线和第三或第四电源线。

    Differential transmission line
    27.
    发明申请
    Differential transmission line 有权
    差动传输线

    公开(公告)号：US20080116989A1

    公开(公告)日：2008-05-22

    申请号：US11980616

    申请日：2007-10-31

    Applicant: Hiroshi Kanno ,  Kazuyuki Sakiyama ,  Ushio Sangawa ,  Tomoyasu Fujishima

    Inventor： Hiroshi Kanno ,  Kazuyuki Sakiyama ,  Ushio Sangawa ,  Tomoyasu Fujishima

    IPC: H01P3/08

    CPC classification number: H01P3/081 ,  H05K1/0245 ,  H05K1/0253 ,  H05K2201/09272

    Abstract: A differential transmission line includes: a substrate; a ground conductor layer; and a first and a second signal conductor disposed in parallel to each other on the substrate. The first signal conductor and the ground conductor layer compose a first transmission line, whereas the second signal conductor and the ground conductor layer compose a second transmission line. The first transmission line and the second transmission line compose a differential transmission line. The differential transmission line includes a curved region, with a straight region being connected to each end of the curved region. In the ground conductor layer in the curved region, a plurality of slots orthogonal to a local transmission direction of signals in the curved region are formed, and the slots are connected to one another on the inner side of the curvature.

    Abstract translation: 差动传输线包括：基板; 接地导体层; 以及在基板上彼此平行设置的第一和第二信号导体。 第一信号导体和接地导体层构成第一传输线，而第二信号导体和接地导体层构成第二传输线。 第一传输线和第二传输线构成差动传输线。 差动传输线包括弯曲区域，直线区域连接到弯曲区域的每一端。 在弯曲区域的接地导体层中，形成与弯曲区域中的信号的局部传输方向正交的多个槽，并且在曲率的内侧上彼此连接。

    Integrated circuit chip module
    28.
    发明申请
    Integrated circuit chip module 有权
    集成电路芯片模块

    公开(公告)号：US20040065962A1

    公开(公告)日：2004-04-08

    申请号：US10395382

    申请日：2003-03-25

    Applicant: Mitsubishi Denki Kabushiki Kaisha

    Inventor： Kohji Shinomiya

    IPC: H01L023/48

    CPC classification number: H01L23/49838 ,  H01L23/50 ,  H01L23/552 ,  H01L25/0655 ,  H01L25/18 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0216 ,  H05K1/0231 ,  H05K1/181 ,  H05K1/189 ,  H05K2201/09236 ,  H05K2201/09254 ,  H05K2201/09272 ,  H05K2201/10522 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00

    Abstract: On the circuit surfaces of integrated circuit chips, there are adjacently laid out a power source pad for a power source wire at a plus voltage side and a power source pad for a power source wire at a minus voltage side. On a single-surface printed wiring board, a first set of two power source wires and a second set of two power source wires are flip-chip mounted with two power source pads of the integrated circuit chips respectively. The first and second sets of the power source wires are formed substantially in parallel with each other, by maintaining substantially constant wire widths and substantially constant wire interval. Near the outer periphery of the printed wiring board, the first and second sets of the power source wires are bent smoothly to follow the periphery.

    Abstract translation: 在集成电路芯片的电路面上，相邻设置用于正电压侧的电源线的电源焊盘和负电压侧的电源线的电源焊盘。 在单面印刷电路板上，第一组两根电源线和第二组两根电源线分别与集成电路芯片的两个电源焊盘一起倒装芯片。 第一组和第二组电源线通过保持基本上恒定的导线宽度和基本上恒定的导线间隔而彼此基本上彼此平行地形成。 在印刷电路板的外周附近，第一和第二组电源线平滑地弯曲以跟随周边。

    Optical proximity correction during wafer processing through subfile bias modification with subsequent subfile merging
    29.
    发明授权
    Optical proximity correction during wafer processing through subfile bias modification with subsequent subfile merging 失效
    通过子文件偏置修改进行晶片处理期间的光学接近校正，随后的子文件合并

    公开(公告)号：US5858591A

    公开(公告)日：1999-01-12

    申请号：US17407

    申请日：1998-02-02

    Applicant: Chia Hui Lin ,  San-De Tzu ,  Chih-Chiang Tu

    Inventor： Chia Hui Lin ,  San-De Tzu ,  Chih-Chiang Tu

    IPC: G03F1/00 ,  H05K3/00 ,  G03F9/00 ,  G03C5/00

    CPC classification number: H05K3/0005 ,  G03F1/36 ,  H05K2201/09272 ,  H05K3/0082

    Abstract: Improvement in the quality of photoresist images has been achieved. The data file in which the full description of the photoresist image, including Optical Proximity Corrections, has been stored is split into two subfiles. The split is made on the basis of separating cell descriptions (where the density of lines is high) from peripheral area descriptions (where lines tend to be isolated). A suitable bias in the form of a small increase or decrease (as appropriate) of all dimensions in the subfile is then applied. After the application of bias, the subfiles are merged back into a single data file and processing proceeds as usual.

    Abstract translation: 已经实现了光刻胶图像质量的提高。 已经存储了包括光学邻近校正的光致抗蚀剂图像的完整描述的数据文件被分成两个子文件。 分割是基于从周边区域描述（其中线路被孤立的）分离单元描述（其中线的密度高）的基础。 然后应用子文件中所有维度的小增加或减小（适当时）形式的合适偏差。 应用偏倚之后，子文件被合并回单个数据文件，处理按照惯例进行。

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