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31.
公开(公告)号:US20190242712A1
公开(公告)日:2019-08-08
申请号:US16385092
申请日:2019-04-16
Applicant: Intel Corporation
CPC classification number: G01C21/20 , G01C5/06 , G01C21/206 , G01S5/0252 , H04W4/02 , H04W4/024
Abstract: Methods, apparatuses and storage medium associated with navigation service are disclosed. In various embodiments, a method may include collecting, by a client mobile device, ambient barometric pressure information at a current location of the client mobile device. The method may further include providing, by the mobile device, contemporaneous navigation assistance to a user of the mobile device or for a user of the mobile device, assisted by a remote navigation assistance service. Assistance by the remote navigation service is associated with determining the current elevation level, based at least in part on ambient barometric pressure information collected by the client mobile device and by one or more crowdsourced mobile devices at the current location. Other embodiments may be disclosed or claimed.
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公开(公告)号:US20190229897A1
公开(公告)日:2019-07-25
申请号:US16368982
申请日:2019-03-29
Applicant: Intel Corporation
Inventor: Timothy Verrall , Thomas Willhalm , Francesc Guim Bernat , Karthik Kumar , Ned M. Smith , Rajesh Poornachandran , Kapil Sood , Tarun Viswanathan , John J. Browne , Patrick Kutch
IPC: H04L9/08
Abstract: Technologies for accelerated key caching in an edge hierarchy include multiple edge appliance devices organized in tiers. An edge appliance device receives a request for a key, such as a private key. The edge appliance device determines whether the key is included in a local key cache and, if not, requests the key from an edge appliance device included in an inner tier of the edge hierarchy. The edge appliance device may request the key from an edge appliance device included in a peer tier of the edge hierarchy. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys in the key cache for eviction. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys for pre-fetching. Those functions of the edge appliance device may be performed by an accelerator such as an FPGA. Other embodiments are described and claimed.
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33.
公开(公告)号:US20190123912A1
公开(公告)日:2019-04-25
申请号:US16231172
申请日:2018-12-21
Applicant: Intel Corporation
Inventor: Ned Smith , Rajesh Poornachandran , Sundar Nadathur , Abdul M. Bailey
Abstract: A system for supporting Enhanced Privacy Identification (EPID) is provided. The system may include a host processor operable to communicate with a remote requestor, where the host processor needs to perform signature revocation checking in accordance with EPID. To perform signature revocation checking, the host processor has to perform either a sign or verify operation. The host processor may offload the sign/verify operation onto one or more associated hardware acceleration coprocessors. A programmable coprocessor may be dynamically configured to perform the desired number of sign/verify functions in accordance with the requirements of the current workload.
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公开(公告)号:US20190102837A1
公开(公告)日:2019-04-04
申请号:US15720514
申请日:2017-09-29
Applicant: Intel Corporation
Inventor: Ned M. Smith , Rajesh Poornachandran , Michael Nolan , Simon N. Peffers
Abstract: Various systems and methods for exchanging digital information in an online competitive data market and exchange network are disclosed. A buyer utilizes one or more curry functions that are relevant to data to be acquired thereby developing a Future estimate for the data. The Future estimate may be recorded as a Margin Future with an escrow agent acting as an intermediary with investors. Investors may fund the Margin Future based on assessed risk and return on investment as defined in the Margin Future. Once funded, the buyer may acquire the data from the seller and apply value to the data by applying the curry functions, to result in digital information to be traded on the online exchange. Once the Future has been realized by sales to information consumers, the market may distribute the proceeds/profits among the seller, buyer, investor and escrow agent, according to conditions defined in the Margin Future.
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35.
公开(公告)号:US20190049966A1
公开(公告)日:2019-02-14
申请号:US15856310
申请日:2017-12-28
Applicant: Intel Corporation
Inventor: Rajesh Poornachandran , Nagasubramanian Gurumoorthy , Ravishankar Iyer , Lakshman Krishnamurthy
Abstract: Methods, systems, articles of manufacture and apparatus are disclosed to improve autonomous machine capabilities. An example disclosed apparatus includes an agent task manager to retrieve native sensor input data from a sensor of the agent, an agent characteristics engine to identify environmental characteristics based on the retrieved native sensor input data, and a resource allocation modifier to allocate a first quantity of resources of the agent based on a likelihood score associated with the environmental characteristics.
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36.
公开(公告)号:US20190049950A1
公开(公告)日:2019-02-14
申请号:US16133263
申请日:2018-09-17
Applicant: Intel Corporation
Inventor: Rajesh Poornachandran , Ravishankar Iyer , Nilesh Jain , James Kim
Abstract: Embodiments include apparatuses, methods, and systems for computer assisted or autonomous driving (CA/AD). An apparatus for CA/AD may include a data aggregation unit, an environment mapping unit coupled to the data aggregation unit, and a mixed reality content unit coupled to the environment mapping unit. The data aggregation unit collects data from one or more data sources. The environment mapping unit determines, based at least in part on the collected data from the one or more data sources or historical environment data, information about a driving environment associated with a route for the CA/AD vehicle. The mixed reality content unit determines a mixed reality content to be presented to a user according to the information about the driving environment associated with the route to generate an immersive mixed reality experience for the user. Other embodiments may also be described and claimed.
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37.
公开(公告)号:US20190036957A1
公开(公告)日:2019-01-31
申请号:US15827952
申请日:2017-11-30
Applicant: Intel Corporation
Inventor: Ned Smith , Rajesh Poornachandran
Abstract: Example methods, apparatus, systems and articles of manufacture (e.g., non-transitory physical storage media) to provide trust topology selection for distributed transaction processing in computing environments are disclosed herein. Example distributed transaction processing nodes disclosed herein include a distributed transaction application to process a transaction in a computing environment based on at least one of a centralized trust topology or a diffuse trust topology. Disclosed example distributed transaction processing nodes also include a trusted execution environment to protect first data associated with a centralized trust topology and to protect second data associated with a diffuse trust topology. Disclosed example distributed transaction processing nodes further include a trust topology selector to selectively configure the distributed transaction application to use the at least one of the centralized trust topology or the diffuse trust topology to process the transaction.
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公开(公告)号:US20190005208A1
公开(公告)日:2019-01-03
申请号:US15640025
申请日:2017-06-30
Applicant: Intel Corporation
Inventor: Rajneesh Chowdhury , Karthik Veeramani , Rajesh Poornachandran
IPC: G06F21/12 , G06F21/60 , H04L29/06 , H04W12/08 , H04N21/254 , H04N21/4627 , H04L29/08 , H04N21/6437
CPC classification number: G06F21/121 , G06F21/10 , G06F21/602 , H04L63/107 , H04L65/4084 , H04L65/608 , H04L67/104 , H04N21/2541 , H04N21/4122 , H04N21/43637 , H04N21/4627 , H04N21/6437 , H04W12/08
Abstract: Embodiments include apparatuses, methods, and systems including a wireless display system to provide digital right management secure content to a display receiver device. The display transmitter device may determine to provide a decryption and presentation license for the display receiver device based on the DRM credential and the DRM scheme of the display receiver device. The display transmitter device may further pass through the secure DRM content to the display receiver device based on provision of the decryption and presentation license, wherein the secure DRM content is passed through the display transmitter device without transcription by the display transmitter device. Other embodiments may also be described and claimed.
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公开(公告)号:US10025372B2
公开(公告)日:2018-07-17
申请号:US15050222
申请日:2016-02-22
Applicant: INTEL CORPORATION
Abstract: An apparatus may include a memory to store one or more graphics rendering commands in a queue after generation. The apparatus may also include a processor circuit, and a graphics rendering command manager for execution on the processor to dynamically determine at one or more instances a total execution duration for the one or more graphics rendering commands, where the total execution duration comprises a total time to render the one or more graphics rendering commands. The graphics rendering command manager also may be for execution on the processor to generate a signal to transmit the one or more graphics rendering commands for rendering by a graphics processor when the total execution duration exceeds a graphics rendering command execution window.
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40.
公开(公告)号:US20180082083A1
公开(公告)日:2018-03-22
申请号:US15267322
申请日:2016-09-16
Applicant: Intel Corporation
Inventor: Ned M. Smith , Rajesh Poornachandran
CPC classification number: G06F21/64 , G06F9/4403 , G06F9/4416 , G06F21/575
Abstract: Technologies for configuring a FPGA include a computing device having a processor and an FPGA. The computing device starts a secure boot process to establish a chain of trust that includes a trusted execution environment. The trusted execution environment loads an FPGA hash from an FPGA manifest stored in secure storage, and a platform trusted execution environment determines whether the FPGA hash is allowed for launch. To determine if the FPGA hash is allowed for launch, the platform trusted execution environment may evaluate one or more launch policies from the FPGA manifest. If allowed, the trusted execution environment configures the FPGA with an FPGA image corresponding to the FPGA hash and verifies the FPGA image with the FPGA hash. The platform trusted execution environment may receive the FPGA hash from a user via a trusted I/O session or from a remote management server. Other embodiments are described and claimed.
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