公开(公告)号：US06632733B2

公开(公告)日：2003-10-14

申请号：US09808461

申请日：2001-03-14

Applicant: Ilyas Mohammed

Inventor： Ilyas Mohammed

IPC: H01L2144

CPC classification number: H01L21/6835 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A component for fabricating microelectronic assemblies has numerous curved leads on a surface. Each lead has a first anchor end fixed to the body of the component, a second tip end which can be bonded to a contact on a mating component and lifted away from the component body, and an elongated main portion which is bent away from the component body in the lifting action. The first anchor end of each lead is nested within the curved portion of another lead, so as to provide an extraordinarily compact arrangement suitable for use with components having closely spaced contacts as, for example, a semiconductor chip or wafer having a contact pitch less than 500 microns. The leads may be disposed in pairs, with the first anchor end of each lead encompassed by the main portion of the other lead in the same pair.

Abstract translation: 用于制造微电子组件的部件在表面上具有许多弯曲引线。 每个引线具有固定到部件主体的第一锚固端，可以与配合部件上的接触件接合并从组件主体提升的第二顶端，以及远离部件弯曲的细长主体部分 身体在举起动作。 每个引线的第一锚定端嵌套在另一个引线的弯曲部分内，以便提供非常紧凑的布置，适用于具有紧密间隔的触点的部件，例如具有接触间距小于的接触间距的半导体芯片或晶片 500微米。 引线可以成对布置，每个引线的第一锚定端由另一引线的主要部分包围在同一对中。

公开(公告)号：US08957520B2

公开(公告)日：2015-02-17

申请号：US13155552

申请日：2011-06-08

Applicant: Hiroaki Sato ,  Yukio Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

Inventor： Hiroaki Sato ,  Yukio Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40 ,  H01L21/56 ,  H01L23/498 ,  H01L21/48 ,  H01L23/31

CPC classification number: H01L21/561 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00

Abstract: A microelectronic assembly may include a substrate containing a dielectric element having first and second opposed surfaces. The dielectric element may include a first dielectric layer adjacent the first surface, and a second dielectric layer disposed between the first dielectric layer and the second surface. A Young's modulus of the first dielectric layer may be at least 50% greater than the Young's modulus of the second dielectric layer, which is less than two gigapascal (GPa). A conductive structure may extend through the first and second dielectric layers and electrically connect substrate contacts at the first surface with terminals at the second surface. The substrate contacts may be joined with contacts of a microelectronic element through conductive masses, and a rigid underfill may be between the microelectronic element and the first surface. The terminals may be usable to bond the microelectronic assembly to contacts of a component external to the microelectronic assembly.

Abstract translation: 微电子组件可以包括含有具有第一和第二相对表面的电介质元件的衬底。 电介质元件可以包括与第一表面相邻的第一电介质层，以及设置在第一介电层和第二表面之间的第二电介质层。 第一电介质层的杨氏模量可以比第二电介质层的杨氏模量大至少50％，小于二千兆帕（GPa）。 导电结构可以延伸穿过第一和第二电介质层，并且将第一表面处的基板触点与第二表面上的端子电连接。 衬底触点可以通过导电块与微电子元件的触点接合，并且刚性底部填充可以在微电子元件和第一表面之间。 端子可以用于将微电子组件接合到微电子组件外部的部件的触点。

公开(公告)号：US08946757B2

公开(公告)日：2015-02-03

申请号：US13399941

申请日：2012-02-17

Applicant: Ilyas Mohammed ,  Masud Beroz

Inventor： Ilyas Mohammed ,  Masud Beroz

IPC: H01L33/00 ,  H01L23/36

CPC classification number: H01L21/4853 ,  H01L21/486 ,  H01L21/52 ,  H01L21/768 ,  H01L23/142 ,  H01L23/49568 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00011

Abstract: Heat spreading substrate with embedded interconnects. In an embodiment in accordance with the present invention, an apparatus includes a metal parallelepiped comprising a plurality of wires inside the metal parallelepiped. The plurality of wires have a different grain structure than the metal parallelepiped. The plurality of wires are electrically isolated from the metal parallelepiped. The plurality of wires may be electrically isolated from one another.

公开(公告)号：US08900974B2

公开(公告)日：2014-12-02

申请号：US13462676

申请日：2012-05-02

Applicant: Liang Wang ,  Ilyas Mohammed ,  Masud Beroz

Inventor： Liang Wang ,  Ilyas Mohammed ,  Masud Beroz

IPC: H01L21/20 ,  H01L21/36 ,  H01L23/00 ,  H01L33/00 ,  H01L25/00 ,  H01L21/683

CPC classification number: H01L23/562 ,  H01L21/02002 ,  H01L21/02035 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/02392 ,  H01L21/02395 ,  H01L21/02414 ,  H01L21/6835 ,  H01L23/544 ,  H01L24/19 ,  H01L24/32 ,  H01L24/83 ,  H01L25/50 ,  H01L27/0207 ,  H01L33/005 ,  H01L33/0062 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/00

Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

公开(公告)号：US08890327B2

公开(公告)日：2014-11-18

申请号：US13246242

申请日：2011-09-27

Applicant: Ilyas Mohammed ,  Belgacem Haba

Inventor： Ilyas Mohammed ,  Belgacem Haba

IPC: H01L23/48 ,  H01L25/065 ,  H01L25/10 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L25/0657 ,  H01L21/563 ,  H01L23/3157 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/06135 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/484 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2224/45099 ,  H01L2924/00011

Abstract: A microelectronic assembly includes first and second microelectronic elements. Each of the microelectronic elements has oppositely-facing first and second surfaces and edges bounding the surfaces. The first microelectronic element is disposed on the second microelectronic element with the second surface of the first microelectronic element facing toward the first surface of the second microelectronic element. The first microelectronic element preferably extends beyond at least one edge of the second microelectronic element and the second microelectronic element preferably extends beyond at least one edge of the first microelectronic element. A first edge of the first microelectronic element has a length that is smaller than a first edge of the second microelectronic element. A second edge of the first microelectronic element has a length that is greater than the second edge of the second microelectronic element.

Abstract translation: 微电子组件包括第一和第二微电子元件。 每个微电子元件具有面对面的第一和第二表面和边缘。 第一微电子元件设置在第二微电子元件上，第一微电子元件的第二表面朝向第二微电子元件的第一表面。 第一微电子元件优选地延伸超过第二微电子元件的至少一个边缘，并且第二微电子元件优选地延伸超过第一微电子元件的至少一个边缘。 第一微电子元件的第一边缘具有小于第二微电子元件的第一边缘的长度。 第一微电子元件的第二边缘具有大于第二微电子元件的第二边缘的长度。

公开(公告)号：US08890304B2

公开(公告)日：2014-11-18

申请号：US13155719

申请日：2011-06-08

Applicant: Hiroaki Sato ,  Kiyoaki Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

Inventor： Hiroaki Sato ,  Kiyoaki Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

IPC: H01L23/04 ,  H01L23/00 ,  H01L23/498 ,  H01L23/13 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L24/83 ,  H01L21/561 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/02 ,  H01L24/03 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/0231 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24225 ,  H01L2224/245 ,  H01L2224/29008 ,  H01L2224/32225 ,  H01L2224/73217 ,  H01L2224/76155 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82104 ,  H01L2224/8284 ,  H01L2224/83053 ,  H01L2224/8309 ,  H01L2224/83091 ,  H01L2224/8384 ,  H01L2224/83851 ,  H01L2224/83862 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/06 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A microelectronic package includes a microelectronic unit and a substrate. The microelectronic unit includes a microelectronic element having contacts on a front face. A dielectric material has a first surface substantially flush with the front face of the microelectronic element. Conductive traces have at least portions extending along the front face away from the contacts, at least some of which also extend along the first surface of the dielectric material. Contacts are connected with the traces, at least some of which are disposed at the first surface of the dielectric material. The substrate has first and second opposed surfaces and an edge extending therebetween, the first surface facing the front face of the microelectronic unit, and the second surface having a plurality of terminals thereon configured for electrical connection with at least one external component. Masses of conductive matrix material join the terminals with the redistribution contacts.

Abstract translation: 微电子封装包括微电子单元和衬底。 微电子单元包括具有在正面上的触点的微电子元件。 电介质材料具有与微电子元件的前表面基本齐平的第一表面。 导电迹线具有至少部分，其沿前表面延伸远离触点，其中至少一些部分还沿电介质材料的第一表面延伸。 触头与迹线连接，其中至少一些设置在电介质材料的第一表面。 衬底具有第一和第二相对表面和在其间延伸的边缘，第一表面面向微电子单元的前表面，并且第二表面具有多个端子，其构造成用于与至少一个外部部件电连接。 导电基体材料的质量与再分布接触端子连接。

公开(公告)号：US08841765B2

公开(公告)日：2014-09-23

申请号：US13092376

申请日：2011-04-22

Applicant: Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia

IPC: H01L23/34

CPC classification number: H01L25/18 ,  H01L23/02 ,  H01L23/13 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49827 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15159 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/20645 ,  H05K3/303 ,  H05K2201/10159 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic assembly can include a substrate having first and second surfaces, at least two logic chips overlying the first surface, and a memory chip having a front surface with contacts thereon, the front surface of the memory chip confronting a rear surface of each logic chip. The substrate can have conductive structure thereon and terminals exposed at the second surface for connection with a component. Signal contacts of each logic chip can be directly electrically connected to signal contacts of the other logic chips through the conductive structure of the substrate for transfer of signals between the logic chips. The logic chips can be adapted to simultaneously execute a set of instructions of a given thread of a process. The contacts of the memory chip can be directly electrically connected to the signal contacts of at least one of the logic chips through the conductive structure of the substrate.

Abstract translation: 微电子组件可以包括具有第一表面和第二表面的衬底，覆盖在第一表面上的至少两个逻辑芯片，以及存储芯片，其具有在其上的触点的前表面，存储芯片的前表面面对每个逻辑芯片的后表面 。 衬底可以具有导电结构，并且端子在第二表面处暴露以与部件连接。 每个逻辑芯片的信号触点可以通过衬底的导电结构直接电连接到其他逻辑芯片的信号触点，用于在逻辑芯片之间传输信号。 逻辑芯片可以适于同时执行一个给定的进程线程的一组指令。 存储器芯片的触点可以通过衬底的导电结构直接电连接到至少一个逻辑芯片的信号触点。

公开(公告)号：US08841204B2

公开(公告)日：2014-09-23

申请号：US13908902

申请日：2013-06-03

Applicant: Liang Wang ,  Ilyas Mohammed ,  Masud Beroz

Inventor： Liang Wang ,  Ilyas Mohammed ,  Masud Beroz

IPC: H01L21/00 ,  H01L21/30 ,  H01L21/46 ,  H01L23/00 ,  H01L33/00 ,  H01L21/683 ,  H01L25/00

CPC classification number: H01L23/562 ,  H01L21/02002 ,  H01L21/02035 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/02392 ,  H01L21/02395 ,  H01L21/02414 ,  H01L21/6835 ,  H01L23/544 ,  H01L24/19 ,  H01L24/32 ,  H01L24/83 ,  H01L25/50 ,  H01L27/0207 ,  H01L33/005 ,  H01L33/0062 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/00

Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

Abstract translation: 高产量基板组件。 根据第一方法实施例，将多个搭载基板附接到载体基板。 多个搭载基板的边缘彼此接合。 将多个搭载基板从载体基板上移除以形成基板组件。 处理衬底组件以在衬底组件上产生多个集成电路器件。 处理可以使用设计成处理大于多个背负式基板的单独实例的晶片的制造设备。

公开(公告)号：US08736066B2

公开(公告)日：2014-05-27

申请号：US13051424

申请日：2011-03-18

Applicant: Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/481 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/145 ,  H01L23/147 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/89 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/83 ,  H01L2224/9202 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A microelectronic assembly is provided which includes a first element consisting essentially of at least one of semiconductor or inorganic dielectric material having a surface facing and attached to a major surface of a microelectronic element at which a plurality of conductive pads are exposed, the microelectronic element having active semiconductor devices therein. A first opening extends from an exposed surface of the first element towards the surface attached to the microelectronic element, and a second opening extends from the first opening to a first one of the conductive pads, wherein where the first and second openings meet, interior surfaces of the first and second openings extend at different angles relative to the major surface of the microelectronic element. A conductive element extends within the first and second openings and contacts the at least one conductive pad.

Abstract translation: 提供了一种微电子组件，其包括基本上由半导体或无机电介质材料中的至少一种构成的第一元件，该介电材料具有面向并附着到微电子元件的主表面的表面，在该电子元件的主表面处暴露多个导电焊盘，该微电子元件具有 其中有源半导体器件。 第一开口从第一元件的暴露表面延伸到附接到微电子元件的表面，并且第二开口从第一开口延伸到第一导电焊盘中，其中第一和第二开口相交，其中内表面 第一和第二开口相对于微电子元件的主表面以不同的角度延伸。 导电元件在第一和第二开口内延伸并接触至少一个导电垫。

公开(公告)号：US08685793B2

公开(公告)日：2014-04-01

申请号：US12883421

申请日：2010-09-16

Applicant: Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/522

CPC classification number: H01L24/80 ,  H01L21/6835 ,  H01L21/76805 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5384 ,  H01L24/02 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/0235 ,  H01L2224/02371 ,  H01L2224/2401 ,  H01L2224/2405 ,  H01L2224/24146 ,  H01L2224/244 ,  H01L2224/2512 ,  H01L2224/32225 ,  H01L2224/82005 ,  H01L2224/821 ,  H01L2224/82106 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/92244 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2225/06544 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2224/27 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

Abstract: An assembly and method of making same are provided. The assembly can be formed by juxtaposing a first electrically conductive element overlying a major surface of a first semiconductor element with an electrically conductive pad exposed at a front surface of a second semiconductor element. An opening can be formed extending through the conductive pad of the second semiconductor element and exposing a surface of the first conductive element. The opening may alternatively be formed extending through the first conductive element. A second electrically conductive element can be formed extending at least within the opening and electrically contacting the conductive pad and the first conductive element. A third semiconductor element can be positioned in a similar manner with respect to the second semiconductor element.