公开(公告)号：US20240357745A1

公开(公告)日：2024-10-24

申请号：US18326029

申请日：2023-05-31

Applicant: INNODISK CORPORATION

Inventor： CHIH-CHIEH KAO

IPC: H05K1/18 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K1/181 ,  H05K1/0203 ,  H05K1/111 ,  H05K2201/066 ,  H05K2201/10015 ,  H05K2201/10159

Abstract: A high capacitance memory device comprises a printed circuit board provided with a plurality of metal connection pads and at least one capacitor core is arranged on the printed circuit board. The capacitor core has connection pins and is electrically connected to the metal connection pads through a conductive glue. An adhesive layer covers the capacitor core. A memory module is set on the printed circuit board and electrically connected to the capacitor core.

公开(公告)号：US20240355776A1

公开(公告)日：2024-10-24

申请号：US18465168

申请日：2023-09-12

Applicant: SK hynix Inc.

Inventor： Dong Sop LEE

IPC: H01L25/065 ,  H01L25/18 ,  H05K1/18 ,  H10B80/00

CPC classification number: H01L25/0652 ,  H01L25/18 ,  H05K1/181 ,  H10B80/00 ,  H05K2201/10159

Abstract: In an embodiment of the present disclosure, since peripheral capacitors are disposed in an area other than an area where a plurality of memory cells of a memory are disposed, by using a method of forming cell capacitors disposed in the plurality of memory cells, the peripheral capacitors may be provided while improving the spatial efficiency of the memory. The peripheral capacitors of the memory may be provided as passive elements of a circuit positioned outside the memory, and thus, various semiconductor packages each including a memory may be easily implemented.

公开(公告)号：US12127430B2

公开(公告)日：2024-10-22

申请号：US17589872

申请日：2022-01-31

Applicant: Meta Platforms Technologies, LLC

Inventor： Giti Karimi Moghaddam ,  Douglas Moskowitz ,  Kyung Won Park ,  Ryan Fleming ,  Alexander Klement ,  Donghee Nam ,  Yi-Chen Kuo ,  Mark Shintaro Ando

IPC: H05K1/00 ,  H01L25/18 ,  H05K1/02 ,  H05K1/18 ,  H05K7/20 ,  H10K50/87

CPC classification number: H10K50/87 ,  H01L25/18 ,  H05K1/0204 ,  H05K1/189 ,  H05K7/20972 ,  H05K7/2099 ,  H05K2201/056 ,  H05K2201/10128 ,  H05K2201/10159 ,  H05K2201/2036

Abstract: A device includes a micro-organic light emitting diode (μ-OLED) display panel and an electronic component. An electrical connector electrically couples the μ-OLED display panel and the electronic component. A standoff is disposed between the electronic component and the μ-OLED display panel. The standoff physically couples the electronic component and the μ-OLED display panel with a gap therebetween. The gap thermally decouples the electronic component from the μ-OLED display panel. A U-shaped heat sink can be disposed in the standoff, and heat generated by the μ-OLED display can be mitigated by a system fan when a U-shaped heat sink is disposed in the standoff.

公开(公告)号：US20240334600A1

公开(公告)日：2024-10-03

申请号：US18739944

申请日：2024-06-11

Applicant: Intel Corporation

Inventor： Min Suet Lim ,  Rijo Kizhakkedathu Avarachan ,  Eng Huat Goh

IPC: H05K1/11 ,  H01L23/00 ,  H05K1/18 ,  H10B80/00

CPC classification number: H05K1/111 ,  H05K1/181 ,  H01L24/16 ,  H01L2224/16227 ,  H05K2201/10159 ,  H10B80/00

Abstract: Printed circuit boards including direct routing from integrated circuit packages are disclosed. An example substrate disclosed herein including a first contact pad array to receive an integrated circuit package, a second contact pad array to receive a memory die, the first contact pad array having a matching arrangement as the second contact pad array, and a layer including a plurality of interconnections extending between the first contact pad array and the second contact pad array.

公开(公告)号：US12094866B2

公开(公告)日：2024-09-17

申请号：US18203693

申请日：2023-05-31

Applicant: Kioxia Corporation

Inventor： Hayato Masubuchi ,  Naoki Kimura ,  Manabu Matsumoto ,  Toyota Morimoto

IPC: G11C5/02 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/528 ,  H01L23/552 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18 ,  H05K1/02 ,  H05K1/18 ,  H05K3/30 ,  H10B69/00

CPC classification number: H01L25/18 ,  G11C5/02 ,  H01L23/3142 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5286 ,  H01L23/552 ,  H01L23/562 ,  H01L25/0655 ,  H01L25/50 ,  H05K1/0225 ,  H05K1/0271 ,  H05K1/0298 ,  H05K1/181 ,  H05K3/305 ,  H10B69/00 ,  H01L23/3121 ,  H01L2924/0002 ,  H05K2201/09136 ,  H05K2201/09681 ,  H05K2201/10159 ,  Y02P70/50 ,  H01L2924/0002 ,  H01L2924/00

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

公开(公告)号：US12082340B2

公开(公告)日：2024-09-03

申请号：US17685853

申请日：2022-03-03

Applicant: KIOXIA CORPORATION

Inventor： Yuta Tsubouchi

IPC: H05K1/18 ,  H01L25/065

CPC classification number: H05K1/181 ,  H01L25/0652 ,  H01L25/0655 ,  H05K2201/09418 ,  H05K2201/09427 ,  H05K2201/10159 ,  H05K2201/10522 ,  H05K2201/10545

Abstract: According to one embodiment, a semiconductor device includes receiving terminals on a surface of a substrate to receive first signals and transmitting terminals on the surface of the substrate to transmit second signals. The transmitting terminals are symmetrically positioned on the surface of the substrate with respect to the receiving terminals at a substantially 90 degree rotation about a rotation center position. The ordering of the transmitting terminals along the surface of the substrate from the rotation center position matches the ordering of the receiving terminals along the surface of the substrate from the rotation center position.

公开(公告)号：US12080064B1

公开(公告)日：2024-09-03

申请号：US18586401

申请日：2024-02-23

Applicant: Tartan Aerial Sense Tech Private Limited

Inventor： Gunasekaran Srinivasan ,  Dhivakar Kanagaraj ,  Pranav M P ,  Raghul Raghu ,  Prakash Mathews Pothen ,  S Prajwal

IPC: G06V20/00 ,  G06T3/4015 ,  G06V10/25 ,  G06V10/82 ,  G06V20/10 ,  H04N9/73 ,  H05K1/18

CPC classification number: G06V20/188 ,  G06T3/4015 ,  G06V10/25 ,  G06V10/82 ,  H04N9/73 ,  H05K1/181 ,  G06V2201/07 ,  H05K2201/10121 ,  H05K2201/10151 ,  H05K2201/10159

Abstract: A camera apparatus including a central processing unit configured to capture raw image sensor data of a field-of-view of an agricultural field, concurrently execute a plurality of different image transformation operations in a single pass on the captured raw image sensor data to obtain a processed image output, based on an one-time read of pixel values of the captured raw image sensor data and push the processed image output in a shared memory accessible to a plurality of application nodes in the camera apparatus. The camera apparatus includes a graphical processing unit configured to execute a first neural network model on the processed image output to detect one or more foliage regions in the processed image output and concomitantly execute a second neural network model on the processed image output to detect one or more crop plants in the processed image output.

公开(公告)号：US12069796B2

公开(公告)日：2024-08-20

申请号：US17563159

申请日：2021-12-28

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Shigehito Morita ,  Mitsuhiro Iizuka ,  Junichi Ito ,  Keiichi Omyo ,  Toshiya Senoh ,  Masato Yanai ,  Naoto Nishiura

IPC: H05K1/02 ,  H01L23/34 ,  G11C5/06 ,  H05K1/16

CPC classification number: H05K1/0212 ,  H01L23/345 ,  H05K1/0224 ,  H05K1/0298 ,  G11C5/06 ,  H01L23/34 ,  H05K1/167 ,  H05K2201/10022 ,  H05K2201/10151 ,  H05K2201/10159

Abstract: The storage device unit includes: a substrate having a main surface and having a plurality of wiring layers stacked together; and a storage device that has a plate shape having a first surface and is disposed on the substrate, the first surface facing the main surface. The plurality of wiring layers includes a heat-generating layer having a heat-generating circuit.

公开(公告)号：US20240258725A1

公开(公告)日：2024-08-01

申请号：US18636337

申请日：2024-04-16

Applicant: Dell Products L.P.

Inventor： Glenn Chiappe ,  Jason Scott Morrison

IPC: H01R12/70 ,  H05K1/14

CPC classification number: H01R12/7023 ,  H05K1/141 ,  H05K2201/10159

Abstract: Toolless Compression Attached Memory Module (CAMM) installation systems and methods employ a bolster plate with a generally flat, parallelepiped body portion configured to contact one surface of a CAMM Printed Circuit Board (PCB) and provide compression between the CAMM and a z-axis compression connector. The bolster plate body defines (a) ramped keyhole(s), each ramped keyhole converts lateral displacement of the bolster plate into vertical displacement, providing the compression between the CAMM and the z-axis compression connector, by the ramped keyhole(s) sliding along (a) bottom face(s) of (a) head(s) of (a) fixed standoff(s) extending from an information handling system (IHS) PCB, through the z-axis compression connector and the CAMM PCB. The bolster plate may lock in place, laterally displaced, to maintain the compression between the CAMM and the z-axis compression connector. The bolster plate may also have a flange portion extending generally perpendicular from the body portion.

公开(公告)号：US12028971B2

公开(公告)日：2024-07-02

申请号：US17184678

申请日：2021-02-25

Applicant: SEIKO EPSON CORPORATION

Inventor： Kyosuke Shibata ,  Toru Matsuyama

IPC: H01L23/50 ,  G06F13/16 ,  G06F13/38 ,  G06F13/42 ,  G06F15/78 ,  H01L23/498 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K1/029 ,  H01L23/49816 ,  H05K1/0287 ,  H05K1/111 ,  H05K1/181 ,  H05K2201/10159 ,  H05K2201/10212

Abstract: There is provided a semiconductor apparatus including a first high-speed communication controller and a second high-speed communication controller that perform high-speed communication; a first high-speed communication terminal group that includes a first high-speed communication terminal for inputting a first signal; a second high-speed communication terminal group that includes a second high-speed communication terminal for inputting a second signal; and a terminal mounting surface, in which the terminal mounting surface includes a first side and a second side, a shortest distance from the first high-speed communication terminal group to the first side is shorter than a shortest distance from the second high-speed communication terminal group to the first side, and a shortest distance from the second high-speed communication terminal group to the second side is shorter than a shortest distance from the first high-speed communication terminal group to the second side.