公开(公告)号：US20230215400A1

公开(公告)日：2023-07-06

申请号：US18179067

申请日：2023-03-06

Applicant: Intel Corporation

Inventor： Louis Feng ,  Altug Koker ,  Tomasz Janczak ,  Andrew T. Lauritzen ,  David M. Cimini ,  Nikos Kaburlasos ,  Joydeep Ray ,  John H. Feit ,  Travis T. Schluessler ,  Jacek Kwiatkowski ,  Philip R. Laws ,  Devan Burke ,  Elmoustapha Ould-Ahmed-Vall ,  Abhishek R. Appu

IPC: G09G5/00 ,  G09G5/391 ,  G09G5/38 ,  G06T1/20 ,  G09G5/36

CPC classification number: G09G5/005 ,  G06T1/20 ,  G09G5/001 ,  G09G5/38 ,  G09G5/363 ,  G09G5/391 ,  G09G2360/06 ,  G09G2360/08 ,  G09G2360/121 ,  G09G2360/125

Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, an object space adjuster communicatively coupled to the graphics subsystem to adjust an object space parameter based on a screen space parameter, and a sample adjuster communicatively coupled to the graphics subsystem to adjust a sample parameter of the graphics subsystem based on a detected condition. Other embodiments are disclosed and claimed.

公开(公告)号：US11461959B2

公开(公告)日：2022-10-04

申请号：US16865587

申请日：2020-05-04

Applicant: Intel Corporation

Inventor： Prasoonkumar Surti ,  Karthik Vaidyanathan ,  Atsuo Kuwahara ,  Hugues Labbe ,  Sameer Kp ,  Jonathan Kennedy ,  Abhishek R. Appu ,  Jeffery S. Boles ,  Balaji Vembu ,  Michael Apodaca ,  Slawomir Grajewski ,  Gabor Liktor ,  David M. Cimini ,  Andrew T. Lauritzen ,  Travis T. Schluessler ,  Murali Ramadoss ,  Abhishek Venkatesh ,  Joydeep Ray ,  Kai Xiao ,  Ankur N. Shah ,  Altug Koker

IPC: G06T15/40 ,  G06T1/20 ,  G06T15/30 ,  G06T15/00 ,  G06T11/40 ,  G06T17/20

Abstract: The systems, apparatuses and methods may provide a way to adaptively process and aggressively cull geometry data. Systems, apparatuses and methods may provide for processing, by a positional only shading pipeline (POSH), geometry data including surface triangles for a digital representation of a scene. More particularly, systems, apparatuses and methods may provide a way to identify surface triangles in one or more exclusion zones and non-exclusion zones, and cull surface triangles in one or more exclusion zones.

公开(公告)号：US11120766B2

公开(公告)日：2021-09-14

申请号：US16512964

申请日：2019-07-16

Applicant: Intel Corporation

Inventor： Louis Feng ,  Altug Koker ,  Tomasz Janczak ,  Andrew T. Lauritzen ,  David M. Cimini ,  Nikos Kaburlasos ,  Joydeep Ray ,  John H. Feit ,  Travis T. Schluessler ,  Jacek Kwiatkowski ,  Philip R. Laws ,  Devan Burke ,  Elmoustapha Ould-Ahmed-Vall ,  Abhishek R. Appu

IPC: G09G5/391 ,  G09G5/38 ,  G06T1/20 ,  G09G5/36 ,  G09G5/00

Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, an object space adjuster communicatively coupled to the graphics subsystem to adjust an object space parameter based on a screen space parameter, and a sample adjuster communicatively coupled to the graphics subsystem to adjust a sample parameter of the graphics subsystem based on a detected condition. Other embodiments are disclosed and claimed.

公开(公告)号：US20210020143A1

公开(公告)日：2021-01-21

申请号：US16885810

申请日：2020-05-28

Applicant: Intel Corporation

Inventor： Altug Koker ,  Louis Feng ,  Tomasz Janczak ,  Andrew T. Lauritzen ,  David M. Cimini ,  Abhishek R. Appu

IPC: G09G5/36 ,  G06F9/52 ,  G06T1/60 ,  G06F9/30 ,  G02B27/01 ,  G06F12/0817 ,  G09G3/00

Abstract: Systems, apparatuses and methods may provide for technology that detects a memory fence in a thread, adds a group identifier to one or more memory operations in the thread that follow the memory fence, and sends the one or more memory operations and the group identifier to a memory structure. In one example, the group identifier is used to track completion of the one or more memory operations.

公开(公告)号：US10853995B2

公开(公告)日：2020-12-01

申请号：US16439404

申请日：2019-06-12

Applicant: Intel Corporation

Inventor： Louis Feng ,  Altug Koker ,  Tomasz Janczak ,  Andrew T. Lauritzen ,  David M. Cimini

IPC: G06T15/50 ,  G06T15/00

Abstract: Systems, apparatuses and methods may provide for technology that computes, by a shader in a fixed-functionality hardware shader library, a physically based shading model for a type of material. Additionally, the shader may shade one or more surfaces associated with the type of material in accordance with the physically based shading model. In one example, two or more shaders in the shader library are dedicated to different types of materials.

公开(公告)号：US20200334896A1

公开(公告)日：2020-10-22

申请号：US16865587

申请日：2020-05-04

Applicant: Intel Corporation

Inventor： Prasoonkumar Surti ,  Karthik Vaidyanathan ,  Atsuo Kuwahara ,  Hugues Labbe ,  Sameer Kp ,  Jonathan Kennedy ,  Abhishek R. Appu ,  Jeffery S. Boles ,  Balaji Vembu ,  Michael Apodaca ,  Slawomir Grajewski ,  Gabor Liktor ,  David M. Cimini ,  Andrew T. Lauritzen ,  Travis T. Schluessler ,  Murali Ramadoss ,  Abhishek Venkatesh ,  Joydeep Ray ,  Kai Xiao ,  Ankur N. Shah ,  Altug Koker

IPC: G06T15/40 ,  G06T1/20 ,  G06T15/30 ,  G06T15/00 ,  G06T11/40 ,  G06T17/20

Abstract: The systems, apparatuses and methods may provide a way to adaptively process and aggressively cull geometry data. Systems, apparatuses and methods may provide for processing, by a positional only shading pipeline (POSH), geometry data including surface triangles for a digital representation of a scene. More particularly, systems, apparatuses and methods may provide a way to identify surface triangles in one or more exclusion zones and non-exclusion zones, and cull surface triangles surface triangles in one or more exclusion zones.

公开(公告)号：US20200211150A1

公开(公告)日：2020-07-02

申请号：US16729767

申请日：2019-12-30

Applicant: Intel Corporation

Inventor： Louis Feng ,  Altug Koker ,  Tomasz Janczak ,  Andrew T. Lauritzen ,  David M. Cimini

IPC: G06T1/20 ,  G06F9/50 ,  G06T1/60 ,  G06T11/40

Abstract: Systems, methods and apparatuses may provide for deferred geometry rasterization technology that includes a decision controller to determine, based on available resources in a graphics processor and a view frustum, a first portion of graphics information to be output to the graphics processor and a storage device communicatively coupled to the decision controller to store a second portion of the graphics information for future use. Additionally, an output handler may output the first portion of the graphics information to the graphics processor and swap out the second portion for unused graphics information on the graphics processor.

公开(公告)号：US10552934B2

公开(公告)日：2020-02-04

申请号：US15201163

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Michael Apodaca ,  David M. Cimini ,  Thomas F. Raoux ,  Somnath Ghosh ,  Uddipan Mukherjee ,  Debraj Bose ,  Sthiti Deka ,  Yohai Gevim

IPC: G06T1/20 ,  G06T15/80 ,  G06T1/60 ,  G06F12/0886 ,  G06F12/0855 ,  G06F12/084 ,  G06F12/0831 ,  G06F12/0811 ,  G06F12/0804 ,  G06F9/30 ,  G06F12/00

Abstract: Methods and apparatus relating to reducing memory latency in graphics operations are described. In an embodiment, uniform data is transferred from a buffer to a General Register File (GRF) of a processor based at least in part on information stored in a gather table. The uniform data comprises data that is uniform across a plurality of primitives in a graphics operation. Other embodiments are also disclosed and claimed.

公开(公告)号：US10347039B2

公开(公告)日：2019-07-09

申请号：US15489218

申请日：2017-04-17

Applicant: Intel Corporation

Inventor： Louis Feng ,  Altug Koker ,  Tomasz Janczak ,  Andrew T. Lauritzen ,  David M. Cimini

IPC: G06T15/80 ,  G06T15/00 ,  G06T15/50 ,  G06T1/20

Abstract: Systems, apparatuses and methods may provide for technology that computes, by a shader in a fixed-functionality hardware shader library, a physically based shading model for a type of material. Additionally, the shader may shade one or more surfaces associated with the type of material in accordance with the physically based shading model. In one example, two or more shaders in the shader library are dedicated to different types of materials.

公开(公告)号：US09916634B2

公开(公告)日：2018-03-13

申请号：US14738703

申请日：2015-06-12

Applicant: INTEL CORPORATION

Inventor： Michael Apodaca ,  David M. Cimini

IPC: G06T1/20 ,  G06F9/38

CPC classification number: G06T1/20 ,  G06F9/38 ,  G06F9/46

Abstract: A mechanism is described for facilitating efficient graphics command generation and execution for improved graphics performance at computing devices. A method of embodiments, as described herein, includes detecting an application programming interface (API) call to perform a plurality of transactions, where the API call is issued by an application at a first command buffer, where the plurality of transactions include a first set of transactions and a second set of transactions. The method may further include creating a second command buffer and appending the second command buffer to the first command buffer, where creating further includes separating the first set transactions from the second set of transactions. The method may further include executing, via the second command buffer, the first set of transactions, prior to executing the first set of transactions.