公开(公告)号：US20230375887A1

公开(公告)日：2023-11-23

申请号：US18230257

申请日：2023-08-04

Applicant: Japan Display Inc.

Inventor： Takahiro OCHIAI ,  Yukiya HIRABAYASHI ,  Shunpei TAKEUCHI ,  Osamu KOBAYASHI ,  Takeo KOITO ,  Koichi NAGAO

IPC: G02F1/1345 ,  G02F1/139 ,  G02F1/1343

CPC classification number: G02F1/1345 ,  G02F1/1393 ,  G02F1/134309

Abstract: A light adjustment device in which a plurality of liquid crystal cells each including a light adjustment region configured to polarize light emitted from a light source are stacked in a direction in which the light is emitted is disclosed. The liquid crystal cells each include a first substrate including a plurality of first drive electrodes extending in a first direction in the light adjustment region, and a second substrate sandwiching a liquid crystal layer between the first substrate and the second substrate and including a plurality of second drive electrodes extending in a second direction different from the first direction in the light adjustment region.

公开(公告)号：US20190064617A1

公开(公告)日：2019-02-28

申请号：US16171728

申请日：2018-10-26

Applicant: Japan Display Inc.

Inventor： Takahiro OCHIAI ,  Motoharu MIYAMOTO ,  Masahiro HOSHIBA

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  G09G3/36 ,  G02F1/1335 ,  H01L29/786 ,  G02F1/1345

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

公开(公告)号：US20180307072A1

公开(公告)日：2018-10-25

申请号：US16019937

申请日：2018-06-27

Applicant: Japan Display Inc. ,  Panasonic Liquid Crystal Display Co., Ltd.

Inventor： Takahiro OCHIAI ,  Tohru SASAKI ,  Tetsuya NAGATA

IPC: G02F1/1339 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: G02F1/1339 ,  G02F1/13394 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/136277 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13415 ,  G02F2001/13606

Abstract: A column for defining the interval between a TFT substrate and an opposed substrate is formed at a crossing point between a drain line and a scanning line. At the crossing point where the column is formed, the drain line is formed to have a wider width to prevent light leakage. Further, at the crossing point where the column is formed, the scanning line is formed to have a narrower width to prevent increase of capacitance between the drain line and the scanning line. The column is formed at a crossing point corresponding to a specific color, e.g., a blue pixel B, so that a difference in transmittance and in characteristic of thin film transistors due to formation of the column is initially compensated.

公开(公告)号：US20170343870A1

公开(公告)日：2017-11-30

申请号：US15681576

申请日：2017-08-21

Applicant: Japan Display Inc. ,  Panasonic Liquid Crystal Display Co., Ltd.

Inventor： Takahiro OCHIAI ,  Tohru SASAKI ,  Hirotaka IMAYAMA ,  Masateru MORIMOTO

IPC: G02F1/1343 ,  G02F1/136 ,  G02F1/1333 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: G02F1/134363 ,  G02F1/133305 ,  G02F1/133345 ,  G02F1/136 ,  G02F1/136227 ,  G02F1/136277 ,  G02F1/1368 ,  G02F2201/40

Abstract: The present invention realizes a bright image display by enhancing a numerical aperture of pixels. At least a portion of a pixel electrode is overlapped to a thin film transistor by way of a first insulation film, the pixel electrode is connected to an output electrode of the thin film transistor via a contact hole which is formed in the first insulation film, the counter electrode is arranged above the pixel electrode by way of a second insulation film in a state that the counter electrode is overlapped to the pixel electrode, the counter electrode is formed at a position avoiding the contact hole formed in the first insulation film as viewed in a plan view, and at least a portion of the counter electrode is overlapped to the thin film transistor.

公开(公告)号：US20170299929A1

公开(公告)日：2017-10-19

申请号：US15641403

申请日：2017-07-05

Applicant: Japan Display Inc.

Inventor： Takahiro OCHIAI ,  Motoharu MIYAMOTO ,  Masahiro HOSHIBA

IPC: G02F1/1362 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1335 ,  G09G3/36 ,  G02F1/1368 ,  G02F1/1345

CPC classification number: G02F1/136209 ,  G02F1/133512 ,  G02F1/13454 ,  G02F1/136227 ,  G02F1/1368 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0809 ,  G09G2310/0202 ,  H01L27/1222 ,  H01L27/124 ,  H01L29/78609 ,  H01L29/78633 ,  H01L29/78669

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

公开(公告)号：US20170236482A1

公开(公告)日：2017-08-17

申请号：US15584074

申请日：2017-05-02

Applicant: Japan Display Inc.

Inventor： Takahiro OCHIAI ,  Motoharu Miyamoto ,  Masahiro Hoshiba

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  G11C19/28

Abstract: A gate signal line drive circuit whose power consumption is reduced, is provided. In the gate signal line drive circuit having plural basic circuits outputting respective gate signals, each basic circuit includes a high voltage application switching element to which a first basic clock signal having high voltage in a signal high period is input, a low voltage application switching element that turns on at timing starting a signal low period, and outputs a low voltage, and a first low voltage application on control element having an input terminal to which a second basic clock signal subsequent to the first basic clock signal is input, and which turns on according to the signal high period, and outputs the voltage of the second basic clock signal to the control terminal of the low voltage application switching element.

公开(公告)号：US20170177131A1

公开(公告)日：2017-06-22

申请号：US15448169

申请日：2017-03-02

Applicant: Japan Display Inc.

Inventor： Masayuki KOGA ,  Yukiya HIRABAYASHI ,  Takahiro OCHIAI

IPC: G06F3/041 ,  G11C19/18 ,  G02F1/1333 ,  G09G3/20 ,  G06F3/044

CPC classification number: G06F3/0412 ,  G02F1/13338 ,  G06F3/0416 ,  G06F3/044 ,  G09G3/2092 ,  G09G2310/0286 ,  G09G2310/0291 ,  G11C19/184

Abstract: According to an aspect, a display device includes: a display unit that has a plurality of scanning signal lines to which a scanning signal is applied; a shift register that has a plurality of transfer circuits configured in a plurality of stages that perform a shift operation for temporarily storing a shift signal that has been input and sequentially transmitting the stored shift signal to a subsequent stage in synchronization with a clock signal having a discontinued period, and outputs the scanning signal to a scanning signal line corresponding to a transfer circuit that maintains the shift signal; and a signal line that transmits a holding potential signal for maintaining a potential of the shift signal to a transfer circuit that maintains the shift signal in the discontinued period of the clock signal.

公开(公告)号：US20160035272A1

公开(公告)日：2016-02-04

申请号：US14883338

申请日：2015-10-14

Applicant: Japan Display Inc.

Inventor： Motoharu MIYAMOTO ,  Takahiro OCHIAI

IPC: G09G3/20

CPC classification number: G09G3/3677 ,  G02F1/13306 ,  G02F1/1345 ,  G09G3/2096 ,  G09G2300/0426 ,  G09G2300/0809 ,  G09G2310/0202 ,  G09G2310/065

Abstract: A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.

Abstract translation: 显示装置的驱动电路的电路块包括第一晶体管，其在输出周期期间具有连接到具有有效电位的第一节点的栅极，并且控制施加于第一时钟的第一时钟信号线之间的导通 信号和扫描信号线，第二晶体管，其在非输出时段期间具有连接到具有有效电位的第二节点的栅极，并控制第一节点与非活动电位线之间的电导;以及第三晶体管， 具有连接到第一节点的栅极，并且控制第二节点与施加在输出周期结束时具有有效电位的第一周期信号的第一循环信号线之间的导电。

公开(公告)号：US20150293419A1

公开(公告)日：2015-10-15

申请号：US14749132

申请日：2015-06-24

Applicant: Japan Display Inc.

Inventor： Takahiro OCHIAI ,  Motoharu MIYAMOTO ,  Masahiro HOSHIBA

IPC: G02F1/1362 ,  H01L29/786 ,  G02F1/1368

CPC classification number: G02F1/136209 ,  G02F1/133512 ,  G02F1/13454 ,  G02F1/136227 ,  G02F1/1368 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0809 ,  G09G2310/0202 ,  H01L27/1222 ,  H01L27/124 ,  H01L29/78609 ,  H01L29/78633 ,  H01L29/78669

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

Abstract translation: 液晶显示装置设置有薄膜晶体管，该薄膜晶体管包括设置在位于第一绝缘层上的第一电极层中的栅极电极膜，经由第二绝缘层设置在栅电极膜上的半导体膜， 漏电极和源极，设置在位于所述半导体膜上方并与所述半导体膜的上表面接触的第二电极层中，以及设置在所述第一绝缘层下方的遮光膜。 其至少一部分在平面图中与半导体膜和栅电极膜重叠。 漏电极和源电极之一连接到栅极线，并且遮光膜与源电极电连接。

公开(公告)号：US20150091954A1

公开(公告)日：2015-04-02

申请号：US14501099

申请日：2014-09-30

Applicant: Japan Display Inc.

Inventor： Takahiro OCHIAI ,  Yoshinori AOKI ,  Hideo SATO ,  Yoshihiro KOTANI ,  Youichi OOKI

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3677 ,  G09G2300/0852 ,  G09G2310/0283 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/026 ,  G11C19/28

Abstract: A liquid crystal display device includes: pixel electrodes to each of which a potential corresponding to a gray-scale value is applied, for a plurality of pixels arranged in a matrix in a display area, via a pixel transistor of each of the pixels; a common electrode forming, in cooperation with the pixel electrode, an electric field to align a liquid crystal composition; a plurality of scanning signal lines each connected in common to gates of the pixel transistors of the plurality of pixels constituting each of a plurality of rows forming the matrix; and a driver circuit setting, after powering on and before displaying an image in the display area, the common electrode into a high impedance state and then setting the scanning signal line to an inactive potential to cut off a source and a drain of the pixel transistor from each other.

Abstract translation: 液晶显示装置包括：通过每个像素的像素晶体管，对于在显示区域中以矩阵排列的多个像素，施加与灰度值对应的电位的像素电极; 与像素电极协作形成用于使液晶组合物取向的电场的公共电极; 多个扫描信号线，分别与形成矩阵的多个行中的每一个的多个像素的像素晶体管的公共端相连; 以及驱动器电路设置，在上电之后并且在显示区域中显示图像之前，将公共电极设置为高阻抗状态，然后将扫描信号线设置为无效电位，以切断像素晶体管的源极和漏极 从彼此。