公开(公告)号：US12228827B2

公开(公告)日：2025-02-18

申请号：US18449752

申请日：2023-08-15

Applicant: Japan Display Inc.

Inventor： Masateru Morimoto ,  Saori Sugiyama ,  Motoharu Miyamoto

IPC: G02F1/1362 ,  G02F1/1339 ,  G02F1/1343

Abstract: The displacement between a TFT substrate and a counter substrate and the cut of an alignment film caused by a columnar spacer are prevented. A liquid crystal display device includes: a TFT substrate including a scanning line extending in a first direction, a picture signal line extending in a second direction, a pixel electrode formed in a region surrounded by the scanning line and the picture signal line, and a common electrode formed as opposed to the pixel electrode through an insulating film; a counter substrate disposed as opposed to the TFT substrate and having a spacer; and a liquid crystal sandwiched between the substrates. A common metal interconnection is formed to cover the picture signal line or the scanning line, and stacked on the common electrode. A through hole is formed on the common metal interconnection. The tip end of the spacer is disposed inside the through hole.

公开(公告)号：US12066719B2

公开(公告)日：2024-08-20

申请号：US18228305

申请日：2023-07-31

Applicant: Japan Display Inc.

Inventor： Motoharu Miyamoto ,  Tomokazu Ishikawa

IPC: G02F1/1339 ,  G02F1/1362 ,  G09G3/36

CPC classification number: G02F1/1339 ,  G02F1/136286 ,  G09G3/3674

Abstract: Display device is provided and includes scanning line; semiconductor layer; pixel electrode; first insulating film having first contact hole; organic insulating film having second contact hole; and second insulating film having third contact hole, wherein semiconductor layer has first linear portion that is orthogonal to scanning line, pixel electrode is electrically connected to first linear portion via first, second and third contact holes, first linear portion overlaps first, second and third contact holes that are aligned along first linear portion, and center of second contact hole is located between center of first contact hole and center of third contact hole.

公开(公告)号：US10811439B2

公开(公告)日：2020-10-20

申请号：US16181854

申请日：2018-11-06

Applicant: Japan Display Inc.

Inventor： Motoharu Miyamoto ,  Yoshinori Aoki

IPC: H01L27/12 ,  G09G3/3266

Abstract: According to one embodiment, a display device includes a switching element including a drain electrode, a first insulating film including a first through-hole penetrated to the drain electrode, and being formed of an organic insulating material, a first connection electrode which is in contact with the drain electrode at the first through-hole, and is formed of a metal material, a second insulating film which is located on the first insulating film, is formed of an organic insulating material, and includes a second through-hole penetrated to the first connection electrode, and a pixel electrode electrically connected to the first connection electrode.

公开(公告)号：US10288959B2

公开(公告)日：2019-05-14

申请号：US15668747

申请日：2017-08-04

Applicant: Japan Display Inc.

Inventor： Motoharu Miyamoto ,  Hidetatsu Nakamura ,  Yasuhiro Kanaya ,  Yasushi Nakano ,  Yasuhito Aruga

IPC: G02F1/1333 ,  G02F1/1337 ,  G02F1/1343 ,  G02F1/1345 ,  G02F1/1362 ,  G02F1/1368

Abstract: A terminal structure that keeps the resistance of its connecting portion small and secures mechanical reliability is to be achieved. A display device includes a display region and a terminal region. A terminal formed in the terminal region is formed with a terminal metal, a first oxide conductive film covering the end portion of the terminal metal, and a second oxide conductive film covering the first oxide conductive film and the terminal metal. The first oxide conductive film has an opening in the center part of the terminal.

公开(公告)号：US09841650B2

公开(公告)日：2017-12-12

申请号：US15040409

申请日：2016-02-10

Applicant: Japan Display Inc.

Inventor： Takahiro Ochiai ,  Masaki Nishikawa ,  Motoharu Miyamoto

IPC: G02F1/1333 ,  G02F1/1362 ,  G02F1/1343 ,  G02F1/1337 ,  G02F1/1339 ,  G02F1/1345 ,  G02F1/133 ,  G02F1/1368

CPC classification number: G02F1/136204 ,  G02F1/13306 ,  G02F1/133345 ,  G02F1/1337 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/1345 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133368

Abstract: A liquid crystal display device having an alignment layer stopper which is formed external to a display area to suppress the generation of an electric field between signal lines and the alignment layer stopper, wherein the alignment layer stopper includes a second conductive layer SP formed above the first substrate when the alignment layer stopper is formed by coating and a first conductive layer SH formed below the second conductive layer SP through an insulating film and arranged in such a manner that its marginal parts in the longitudinal direction of the second conductive layer SP are exposed when viewed from the plane direction from the second conductive layer SP, and the first conductive layer SH is formed in a thin film layer between signal lines arranged in the side parts of the display area and the second conductive layer SP.

公开(公告)号：US20170236482A1

公开(公告)日：2017-08-17

申请号：US15584074

申请日：2017-05-02

Applicant: Japan Display Inc.

Inventor： Takahiro OCHIAI ,  Motoharu Miyamoto ,  Masahiro Hoshiba

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  G11C19/28

Abstract: A gate signal line drive circuit whose power consumption is reduced, is provided. In the gate signal line drive circuit having plural basic circuits outputting respective gate signals, each basic circuit includes a high voltage application switching element to which a first basic clock signal having high voltage in a signal high period is input, a low voltage application switching element that turns on at timing starting a signal low period, and outputs a low voltage, and a first low voltage application on control element having an input terminal to which a second basic clock signal subsequent to the first basic clock signal is input, and which turns on according to the signal high period, and outputs the voltage of the second basic clock signal to the control terminal of the low voltage application switching element.

公开(公告)号：US12242158B2

公开(公告)日：2025-03-04

申请号：US18751489

申请日：2024-06-24

Applicant: Japan Display Inc.

Inventor： Motoharu Miyamoto

IPC: G02F1/1343 ,  G02F1/1339 ,  G02F1/1362

Abstract: The liquid crystal display device includes: a TFT substrate including scanning lines extending in a first direction and being arranged in a second direction, video signal lines extending in the second direction and being arranged in the first direction, pixel electrodes arranged in regions surrounded by the scanning lines and the video signal lines, and common electrodes formed with an insulating film arranged between the common electrodes and the pixel electrodes; a counter substrate opposed to the TFT substrate; and a liquid crystal. The first common electrode extends between the first and second scanning lines in the first direction, and the second common electrode extends between the second and third scanning lines in the first direction. The first and second common electrodes are electrically connected by a bridge. The bridge covers the first video signal line without covering the second video signal line, when seen in a plan view.

公开(公告)号：US10768494B2

公开(公告)日：2020-09-08

申请号：US16583561

申请日：2019-09-26

Applicant: Japan Display Inc.

Inventor： Motoharu Miyamoto ,  Atsuhiro Katayama

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/133 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1368 ,  G02F1/1335 ,  G02F1/1337 ,  G02F1/1339

Abstract: A liquid crystal display device includes a TFT substrate and a counter substrate with liquid crystal sandwiched therebetween. The TFT substrate has scanning lines 10 extending in a first direction and arrayed in a second direction and video signal lines 20 extending in the second direction and arrayed in the first direction. The TFT substrate has a display area 500 in which TFT pixels are arrayed in a matrix pattern, and a frame area 600 surrounding the display area. In the frame area 600, common bus wires 521 are formed in the same layer and with the same material as the video signal lines 20 and are impressed with a common voltage. Dummy TFTs are formed in a layer under the common bus wires 521. The scanning lines 10, extending over the frame area 600, are divided outside the display area and are interconnected by bridging wires 170.

公开(公告)号：US10228593B2

公开(公告)日：2019-03-12

申请号：US15968334

申请日：2018-05-01

Applicant: Japan Display Inc.

Inventor： Motoharu Miyamoto ,  Atsuhiro Katayama

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/133 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1368 ,  G02F1/1335 ,  G02F1/1337 ,  G02F1/1339

Abstract: A liquid crystal display device includes a TFT substrate and a counter substrate with liquid crystal sandwiched therebetween. The TFT substrate has scanning lines 10 extending in a first direction and arrayed in a second direction and video signal lines 20 extending in the second direction and arrayed in the first direction. The TFT substrate has a display area 500 in which TFT pixels are arrayed in a matrix pattern, and a frame area 600 surrounding the display area. In the frame area 600, common bus wires 521 are formed in the same layer and with the same material as the video signal lines 20 and are impressed with a common voltage. Dummy TFTs are formed in a layer under the common bus wires 521. The scanning lines 10, extending over the frame area 600, are divided outside the display area and are interconnected by bridging wires 170.

公开(公告)号：US10146095B2

公开(公告)日：2018-12-04

申请号：US15641403

申请日：2017-07-05

Applicant: Japan Display Inc.

Inventor： Takahiro Ochiai ,  Motoharu Miyamoto ,  Masahiro Hoshiba

IPC: G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1335 ,  G02F1/1345 ,  H01L29/786 ,  G09G3/36 ,  H01L27/12

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.