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公开(公告)号:US20220068934A1
公开(公告)日:2022-03-03
申请号:US17016609
申请日:2020-09-10
Applicant: Micron Technology, Inc.
Inventor: Guangjun Yang
IPC: H01L27/108
Abstract: A method used in forming an array of vertical transistors comprises forming pillars individually comprising an upper source/drain region, a channel region vertically below the upper source/drain region, and sacrificial material above the upper source/drain region. Intervening material is about the sacrificial material of individual of the pillars. The intervening material and the sacrificial material comprise different compositions relative one another. Horizontally-elongated and spaced conductive gate lines are formed individually operatively aside the channel region of the individual pillars. The sacrificial material is removed to expose the upper source/drain region of the individual pillars and thereby form an opening in the intervening material directly above the upper source/drain region of the individual pillars. Metal material is formed in individual of the openings directly against the upper source/drain region of the individual pillars and atop the intervening material laterally outside of the openings. The metal material that is atop the intervening material interconnects the metal material that is in the individual openings. The metal material is removed back to have an uppermost surface that is no higher than an uppermost surface of the intervening material and to disconnect it from interconnecting the metal material that is in the individual openings and thereby form a laterally-isolated individual metal-material plug in the individual openings.
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公开(公告)号:US10978295B2
公开(公告)日:2021-04-13
申请号:US16445507
申请日:2019-06-19
Applicant: Micron Technology, Inc.
Inventor: Guangjun Yang , Nicholas R. Tapias
IPC: H01L27/105 , H01L27/22 , H01L21/02 , G11C5/06 , H01L27/24
Abstract: Systems, apparatuses, and methods related to epitaxial growth on semiconductor structures are described. An apparatus may include a working surface of a substrate material and a storage node connected to an active area of an access device on the working surface. The apparatus may also include a material epitaxially grown over the storage node contact to enclose a non-solid space between the storage node contact and passing sense lines.
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33.
公开(公告)号:US20200286898A1
公开(公告)日:2020-09-10
申请号:US16880900
申请日:2020-05-21
Applicant: Micron Technology, Inc.
Inventor: Guangjun Yang , Mohd Kamran Akhtar , Silvia Borsari , Alex J. Schrinsky
IPC: H01L27/108
Abstract: Some embodiments include a method of forming an integrated assembly. A construction is formed to include a conductive structure having a top surface, and a pair of sidewall surfaces extending downwardly from the top surface. Insulative material is over the top surface, and rails are along the sidewall surfaces. The rails include sacrificial material. The sacrificial material is removed to leave openings. Sealant material is formed to extend within the openings. The sealant material has a lower dielectric constant than the insulative material. Some embodiments include an integrated assembly having a conductive structure with a top surface and a pair of opposing sidewall surfaces extending downwardly from the top surface. Insulative material is over the top surface. Voids are along the sidewall surfaces and are capped by sealant material. The sealant material has a lower dielectric constant than the insulative material.
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公开(公告)号:US10418275B1
公开(公告)日:2019-09-17
申请号:US16369150
申请日:2019-03-29
Applicant: Micron Technology, Inc.
Inventor: Guangjun Yang
IPC: H01L21/76 , H01L21/764 , H01L21/02 , H01L27/108
Abstract: Some embodiments include a method of forming an integrated assembly. A construction is formed to include a structure having an exposed surface, and to include an opening proximate the structure. An aperture extends into the opening. A first material is deposited to form a mass along the exposed surface of the structure. Particles are sputtered from the mass and across the aperture. The particles agglomerate to form a sealant material which traps a void within the opening.
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35.
公开(公告)号:US20180019245A1
公开(公告)日:2018-01-18
申请号:US15652724
申请日:2017-07-18
Applicant: Micron Technology, Inc.
Inventor: Guangjun Yang , Russell A. Benson , Brent Gilgen , Alex J. Schrinsky , Sanh D. Tang , Si-Woo Lee
IPC: H01L27/108 , H01L21/768
CPC classification number: H01L27/10885 , H01L21/76816 , H01L21/7682 , H01L21/76877 , H01L27/10814 , H01L27/10855
Abstract: A method of forming an elevationally extending conductor laterally between a pair of conductive lines comprises forming a pair of conductive lines spaced from one another in at least one vertical cross-section. Conductor material is formed to elevationally extend laterally between and cross elevationally over the pair of conductive lines in the at least one vertical cross-section. Sacrificial material is laterally between the elevationally extending conductor material and each of the conductive lines of the pair in the at least one vertical cross-section. The sacrificial material is removed from between the elevationally extending conductor material and each of the conductive lines of the pair while the conductor material is crossing elevationally over the pair of conductive lines to form a void space laterally between the elevationally extending conductor material and each of the conductive lines of the pair in the at least one vertical cross-section.
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