公开(公告)号：US20220367118A1

公开(公告)日：2022-11-17

申请号：US17865242

申请日：2022-07-14

Applicant: Micron Technology, Inc.

Inventor： Ashonita A. Chavan ,  Beth R. Cook ,  Manuj Nahar ,  Durai Vishak Nirmal Ramaswamy

IPC: H01G4/38 ,  H01L27/11507 ,  G11C11/22 ,  H01L49/02

Abstract: Some embodiments include an apparatus having horizontally-spaced bottom electrodes supported by a supporting structure. Leaker device material is directly against the bottom electrodes. Insulative material is over the bottom electrodes, and upper electrodes are over the insulative material. Plate material extends across the upper electrodes and couples the upper electrodes to one another. The plate material is directly against the leaker device material. The leaker device material electrically couples the bottom electrodes to the plate material, and may be configured to discharge at least a portion of excess charge from the bottom electrodes to the plate material. Some embodiments include methods of forming apparatuses which include capacitors having bottom electrodes and top electrodes, with the top electrodes being electrically coupled to one another through a conductive plate. Leaker devices are formed to electrically couple the bottom electrodes to the conductive plate.

公开(公告)号：US11264395B1

公开(公告)日：2022-03-01

申请号：US17027046

申请日：2020-09-21

Applicant: Micron Technology, Inc.

Inventor： Hung-Wei Liu ,  Vassil N. Antonov ,  Ashonita A. Chavan ,  Darwin Franseda Fan ,  Jeffery B. Hull ,  Anish A. Khandekar ,  Masihhur R. Laskar ,  Albert Liao ,  Xue-Feng Lin ,  Manuj Nahar ,  Irina V. Vasilyeva

IPC: H01L27/11514 ,  H01L27/11507 ,  H01L29/78 ,  H01L29/66 ,  H01L27/11597 ,  H01L27/1159 ,  H01L29/10 ,  H01L21/223

Abstract: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.

公开(公告)号：US20210175013A1

公开(公告)日：2021-06-10

申请号：US17183285

申请日：2021-02-23

Applicant: Micron Technology, Inc.

Inventor： Manuj Nahar ,  Ashonita A. Chavan

IPC: H01G4/10 ,  H01G4/30 ,  H01L29/66 ,  H01L27/1159 ,  H01L27/11507 ,  H01G4/33 ,  H01L29/78 ,  H01L49/02 ,  H01L21/28 ,  H01L29/51

Abstract: A method used in forming an electronic device comprising conductive material and ferroelectric material comprises forming a composite stack comprising multiple metal oxide-comprising insulator materials. At least one of the metal oxide-comprising insulator materials is between and directly against non-ferroelectric insulating materials. The multiple metal oxide-comprising insulator materials are of different composition from that of immediately-adjacent of the non-ferroelectric insulating materials. The composite stack is subjected to a temperature of at least 200° C. After the subjecting, the composite stack comprises multiple ferroelectric metal oxide-comprising insulator materials at least one of which is between and directly against non-ferroelectric insulating materials. After the subjecting, the composite stack is ferroelectric. Conductive material is formed and that is adjacent the composite stack. Devices are also disclosed.

公开(公告)号：US10923593B1

公开(公告)日：2021-02-16

申请号：US16536479

申请日：2019-08-09

Applicant: Micron Technology, Inc.

Inventor： Manuj Nahar ,  Vassil N. Antonov ,  Darwin Franseda Fan ,  Ali Moballegh

IPC: H01L29/78 ,  H01L27/108 ,  H01L29/66 ,  H01L21/02 ,  H01L29/04

Abstract: A transistor comprises a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region. An upper material is directly above a lower material. The upper material is in at least one of the top source/drain region, the bottom source/drain region, and the channel region. The lower material is in at least one of the top source/drain region, the bottom source/drain region, and the channel region. The upper material comprises 1 atomic percent to 10 atomic percent elemental-form H and 0 total atomic percent to less than 0.1 total atomic percent of one or more noble elements. The lower material comprises 0 atomic percent to less than 1 atomic percent elemental-form H and 0.1 total atomic percent to 10 total atomic percent of one or more noble elements. Other embodiments, including method, are disclosed.

公开(公告)号：US20210043731A1

公开(公告)日：2021-02-11

申请号：US16986436

申请日：2020-08-06

Applicant: Micron Technology, Inc.

Inventor： Manuj Nahar ,  Vassil N. Antonov ,  Kamal M. Karda ,  Michael Mutch ,  Hung-Wei Liu ,  Jeffery B. Hull

IPC: H01L29/08 ,  H01L29/04 ,  H01L29/06 ,  H01L29/78 ,  H01L21/02 ,  H01L29/66

Abstract: A transistor comprises a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region. The channel region is crystalline and comprises a plurality of vertically-elongated crystal grains that individually are directly against both of the top source/drain region and the bottom source/drain region. Other embodiments, including methods, are disclosed.

公开(公告)号：US20200373314A1

公开(公告)日：2020-11-26

申请号：US16989218

申请日：2020-08-10

Applicant: Micron Technology, Inc.

Inventor： Ashonita A. Chavan ,  Durai Vishak Nirmal Ramaswamy ,  Manuj Nahar

IPC: H01L27/11507 ,  H01L21/28 ,  H01L29/78 ,  H01L21/02 ,  H01L27/1159 ,  H01L49/02 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66

Abstract: A method used in forming an electronic component comprising conductive material and ferroelectric material comprises forming a non-ferroelectric metal oxide-comprising insulator material over a substrate. A composite stack comprising at least two different composition non-ferroelectric metal oxides is formed over the substrate. The composite stack has an overall conductivity of at least 1×102 Siemens/cm. The composite stack is used to render the non-ferroelectric metal oxide-comprising insulator material to be ferroelectric. Conductive material is formed over the composite stack and the insulator material. Ferroelectric capacitors and ferroelectric field effect transistors independent of method of manufacture are also disclosed.

公开(公告)号：US20200303493A1

公开(公告)日：2020-09-24

申请号：US16898029

申请日：2020-06-10

Applicant: Micron Technology, Inc.

Inventor： Michael Mutch ,  Manuj Nahar ,  Wayne I. Kinney

IPC: H01L29/04 ,  H01L21/02 ,  H01L29/161 ,  H01L21/324

Abstract: A method includes forming a semiconductor structure. The structure includes a first material, a blocking material, a second material in an amorphous form, and a third material in an amorphous form. The blocking material is disposed between the first material and the second material. At least the second material and the third material each comprise silicon and/or germanium. The structure is exposed to a temperature above a crystallization temperature of the third material and below a crystallization temperature of the second material. Semiconductor structures, memory devices, and systems are also disclosed.

公开(公告)号：US10748914B2

公开(公告)日：2020-08-18

申请号：US15840251

申请日：2017-12-13

Applicant: Micron Technology, Inc.

Inventor： Ashonita A. Chavan ,  Durai Vishak Nirmal Ramaswamy ,  Manuj Nahar

IPC: H01L27/11507 ,  H01L21/28 ,  H01L29/78 ,  H01L21/02 ,  H01L27/1159 ,  H01L49/02 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66

Abstract: A method used in forming an electronic component comprising conductive material and ferroelectric material comprises forming a non-ferroelectric metal oxide-comprising insulator material over a substrate. A composite stack comprising at least two different composition non-ferroelectric metal oxides is formed over the substrate. The composite stack has an overall conductivity of at least 1×102 Siemens/cm. The composite stack is used to render the non-ferroelectric metal oxide-comprising insulator material to be ferroelectric. Conductive material is formed over the composite stack and the insulator material. Ferroelectric capacitors and ferroelectric field effect transistors independent of method of manufacture are also disclosed.

公开(公告)号：US10553673B2

公开(公告)日：2020-02-04

申请号：US15855665

申请日：2017-12-27

Applicant: Micron Technology, Inc.

Inventor： Manuj Nahar ,  Vassil N. Antonov

IPC: H01L21/02 ,  C23C16/02 ,  C23C16/34 ,  C23C16/40 ,  C23C16/455 ,  H01L27/108 ,  B82Y99/00 ,  H01L49/02

Abstract: A method used in forming at least a portion of at least one conductive capacitor electrode of a capacitor that comprises a pair of conductive capacitor electrodes having a capacitor insulator there-between comprises forming an insulative first material comprising an amorphous insulative metal oxide. The amorphous insulative metal oxide is reduced in a reducing-ambient to form a conductive second material from the insulative first material. Such reducing in the reducing-ambient both (a) removes oxygen from and changes the stoichiometry of the metal oxide, and (b) crystallizes the metal oxide into a crystalline state that is conductive.

公开(公告)号：US20180102374A1

公开(公告)日：2018-04-12

申请号：US15840251

申请日：2017-12-13

Applicant: Micron Technology, Inc.

Inventor： Ashonita A. Chavan ,  Durai Vishak Nirmal Ramaswamy ,  Manuj Nahar

IPC: H01L27/11507 ,  H01L29/51 ,  H01L29/78 ,  H01L49/02 ,  H01L21/02 ,  H01L21/28 ,  H01L27/1159 ,  H01L29/66 ,  H01L29/49

Abstract: A method used in forming an electronic component comprising conductive material and ferroelectric material comprises forming a non-ferroelectric metal oxide-comprising insulator material over a substrate. A composite stack comprising at least two different composition non-ferroelectric metal oxides is formed over the substrate. The composite stack has an overall conductivity of at least 1×102 Siemens/cm. The composite stack is used to render the non-ferroelectric metal oxide-comprising insulator material to be ferroelectric. Conductive material is formed over the composite stack and the insulator material. Ferroelectric capacitors and ferroelectric field effect transistors independent of method of manufacture are also disclosed.